SLAU647O July 2015 – April 2020
Table 17 describes the electrical state of every JTAG pin after debug probe power up.
Signal Name | After Power up | When Spy-Bi-Wire Protocol is Active |
---|---|---|
SBWTDIO | Hi-Z, pulled up to 3.3 V | In and Out, SBWTDIO |
SBWTCK | Hi-Z, pulled up to 3.3 V | Out, SBWTCK |
TXD | Hi-Z, pulled up to 3.3 V | In, Target UART TXD output |
RXD | Hi-Z, pulled up to 3.3 V | Out, Target UART RXD input |
CTS | Hi-Z, pulled up to 3.3 V | Out, Target UART Clear-To- Send Handshake input |
RTS | Hi-Z, pulled up to 3.3 V | In, Target UART Ready-to Send Handshake output |
3V3 | Target VCC | Target VCC |
5V | USB VCC | USB VCC |
GND | Ground | Ground |