| 31-20 |
RESERVED |
R |
0x0 |
|
| 19 |
DCONSS3 |
R/W |
0x0 |
Digital Comparator Interrupt on SS3.
0x0 = The status of the digital comparators does not affect the SS3 interrupt status.
0x1 = The raw interrupt signal from the digital comparators (INRDC bit in the ADCRIS register) is sent to the interrupt controller on the SS3 interrupt line.
|
| 18 |
DCONSS2 |
R/W |
0x0 |
Digital Comparator Interrupt on SS2.
0x0 = The status of the digital comparators does not affect the SS2 interrupt status.
0x1 = The raw interrupt signal from the digital comparators (INRDC bit in the ADCRIS register) is sent to the interrupt controller on the SS2 interrupt line.
|
| 17 |
DCONSS1 |
R/W |
0x0 |
Digital Comparator Interrupt on SS1.
0x0 = The status of the digital comparators does not affect the SS1 interrupt status.
0x1 = The raw interrupt signal from the digital comparators (INRDC bit in the ADCRIS register) is sent to the interrupt controller on the SS1 interrupt line.
|
| 16 |
DCONSS0 |
R/W |
0x0 |
Digital Comparator Interrupt on SS0.
0x0 = The status of the digital comparators does not affect the SS0 interrupt status.
0x1 = The raw interrupt signal from the digital comparators (INRDC bit in the ADCRIS register) is sent to the interrupt controller on the SS0 interrupt line.
|
| 15-12 |
RESERVED |
R |
0x0 |
|
| 11 |
DMAMASK3 |
R/W |
0x0 |
SS3 DMA Interrupt Mask.
0x0 = The status of Sample Sequencer 3 DMA does not affect the SS3 interrupt status.
0x1 = The raw interrupt signal from Sample Sequencer 3 DMA (ADCRIS register DMAINR3 bit) is sent to the interrupt controller.
|
| 10 |
DMAMASK2 |
R/W |
0x0 |
SS2 DMA Interrupt Mask.
0x0 = The status of Sample Sequencer 2 DMA does not affect the SS2 interrupt status.
0x1 = The raw interrupt signal from Sample Sequencer 2 DMA (ADCRIS register DMAINR2 bit) is sent to the interrupt controller.
|
| 9 |
DMAMASK1 |
R/W |
0x0 |
SS1 DMA Interrupt Mask.
0x0 = The status of Sample Sequencer 1 DMA does not affect the SS1 interrupt status.
0x1 = The raw interrupt signal from Sample Sequencer 1 DMA (ADCRIS register DMAINR1 bit) is sent to the interrupt controller.
|
| 8 |
DMAMASK0 |
R/W |
0x0 |
SS0 DMA Interrupt Mask.
0x0 = The status of Sample Sequencer 0 DMA does not affect the SS0 interrupt status.
0x1 = The raw interrupt signal from Sample Sequencer 0 DMA (ADCRIS register DMAINR0 bit) is sent to the interrupt controller.
|
| 7-4 |
RESERVED |
R |
0x0 |
|
| 3 |
MASK3 |
R/W |
0x0 |
SS3 Interrupt Mask.
0x0 = The status of Sample Sequencer 3 does not affect the SS3 interrupt status.
0x1 = The raw interrupt signal from Sample Sequencer 3 (ADCRIS register INR3 bit) is sent to the interrupt controller.
|
| 2 |
MASK2 |
R/W |
0x0 |
SS2 Interrupt Mask.
0x0 = The status of Sample Sequencer 2 does not affect the SS2 interrupt status.
0x1 = The raw interrupt signal from Sample Sequencer 2 (ADCRIS register INR2 bit) is sent to the interrupt controller.
|
| 1 |
MASK1 |
R/W |
0x0 |
SS1 Interrupt Mask.
.
0x0 = The status of Sample Sequencer 1 does not affect the SS1 interrupt status.
0x1 = The raw interrupt signal from Sample Sequencer 1 (ADCRIS register INR1 bit) is sent to the interrupt controller.
|
| 0 |
MASK0 |
R/W |
0x0 |
SS0 Interrupt Mask.
0x0 = The status of Sample Sequencer 0 does not affect the SS0 interrupt status.
0x1 = The raw interrupt signal from Sample Sequencer 0 (ADCRIS register INR0 bit) is sent to the interrupt controller.
|