SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Table 7-5 identifies the bus masters and their access to the various memories on the bus matrix.
| Master | Flash Access | ROM Access | SRAM Access | EEPROM Access | External Memory Access (Through EPI) |
|---|---|---|---|---|---|
| CPU Instruction Bus | Yes | Yes (read only) | Yes | Yes | Yes |
| CPU Data Bus | Yes | Yes (read only) | – | Yes | Yes |
| µDMA | Yes (read only, run-mode only) | – | Yes | Yes | Yes |
| Ethernet Module | – | – | Yes | – | – |
| USB | – | – | Yes | – | – |
| LCD | – | – | Yes | – | Yes |