SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
The Hibernation module provides two mechanisms for power control:
The Hibernation module power source is supplied by VDD as long as it is within a valid range, even if VBAT > VDD. The Hibernation module also has an independent clock source to maintain a real-time clock (RTC) when the system clock is powered down. Hibernate mode can be entered through one of two ways:
When in hibernation, the module signals an external voltage regulator to turn the power back on when an external pin (WAKE, RST or a wake-enabled GPIO pin) is asserted or when the internal RTC reaches a certain value. The Hibernation module can also detect when the battery voltage is low and optionally prevent hibernation or wake from hibernation when the battery voltage falls below a certain threshold. Note that multiple wake sources can be configured at the same time to generate a wake signal such that any of them can wake the module.
When waking from hibernation, the HIB signal is deasserted. The return of VDDcauses a POR to be executed. The time from when the WAKE signal is asserted to when code begins execution is equal to the wake-up time (tWAKE_TO_HIB) plus the power-on-reset time (tPOR).