| 31-9 |
RESERVED |
R |
0x0 |
|
| 8 |
RXFFIC |
W |
0x0 |
Receive FIFO Full Interrupt Mask. Writing a 1 to this bit clears the RXFFIS bit in the I2CSRIS register and the RXFFMIS bit in the I2CSMIS register. A read of this register returns no meaningful data.
|
| 7 |
TXFEIC |
W |
0x0 |
Transmit FIFO Empty Interrupt Mask. Writing a 1 to this bit clears the TXFERIS bit in the I2CSRIS register and the TXFEMIS bit in the I2CSMIS register. A read of this register returns no meaningful data.
|
| 6 |
RXIC |
W |
0x0 |
Receive Request Interrupt Mask. Writing a 1 to this bit clears the RXRIS bit in the I2CSRIS register and the RXMIS bit in the I2CSMIS register. A read of this register returns no meaningful data.
|
| 5 |
TXIC |
W |
0x0 |
Transmit Request Interrupt Mask. Writing a 1 to this bit clears the TXRIS bit in the I2CSRIS register and the TXMIS bit in the I2CSMIS register. A read of this register returns no meaningful data.
|
| 4 |
DMATXIC |
W |
0x0 |
Transmit DMA Interrupt Clear. Writing a 1 to this bit clears the DMATXRIS bit in the I2CSRIS register and the DMATXMIS bit in the I2CSMIS register. A read of this register returns no meaningful data.
|
| 3 |
DMARXIC |
W |
0x0 |
Receive DMA Interrupt Clear. Writing a 1 to this bit clears the DMARXRIS bit in the I2CSRIS register and the DMARXMIS bit in the I2CSMIS register. A read of this register returns no meaningful data.
|
| 2 |
STOPIC |
W |
0x0 |
Stop Condition Interrupt Clear. Writing a 1 to this bit clears the STOPRIS bit in the I2CSRIS register and the STOPMIS bit in the I2CSMIS register. A read of this register returns no meaningful data.
|
| 1 |
STARTIC |
W |
0x0 |
Start Condition Interrupt Clear. Writing a 1 to this bit clears the STARTRIS bit in the I2CSRIS register and the STARTMIS bit in the I2CSMIS register. A read of this register returns no meaningful data.
|
| 0 |
DATAIC |
W |
0x0 |
Data Interrupt Clear. Writing a 1 to this bit clears the DATARIS bit in the I2CSRIS register and the DATMIS bit in the I2CSMIS register. A read of this register returns no meaningful data.
|