27.3.6.4.1 Individual Packet: Rx Endpoint
The transfer of individual packets is normally carried out using DMA Mode 0. For this, the USB Rx endpoint should be programmed as follows:
- The relevant interrupt enable bit in the USB Receive Interrupt Enable (USBRXIE) register should be set to 1.
- The DMAEN bit of the appropriate USB Receive Control and Status Endpoint n High (USBRXCSRHn) register is set to 0.
When a packet has been received by the USB, it generates the appropriate Endpoint interrupt. The processor should then program the selected channel of the DMA controller as follows:
- The USB DMA Address n (USBDMAADDRn) register should be written with the memory address to store the packet.
- The USB DMA Count n (USBDMACOUNTn) register should be programmed with the size of packet which is determined by reading the USB Receive Byte Count Endpoint n (USBCOUNTn) register.
- he BRSTM field should be configured in the USB DMA Control n (USBDMACTLn) register and the remaining bits should be programmed with the following:
ENABLE = 0x1; DIR = 0x0; MODE = 0x0; IE = 0x1.
The DMA controller then requests bus mastership and transfers the packet to memory. When it has completed the transfer, it generates a DMA interrupt. The processor should then clear the RXRDY bit in the USB Receive Control and Status Endpoint n Low (USBRXCSRLn) register.