SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
USB High-Speed Last Transaction to End of Frame Timing (USBHSEOF)
OTG A / Host
OTG B / Device
This 8-bit register sets the minimum time gap that is to be allowed between the start of the last transaction and the EOF for High-speed transactions.
USBHSEOF is shown in Figure 27-30 and described in Table 27-35.
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7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
HSEOFG | |||||||
R/W-0x80 | |||||||