SLAU789A November   2023  – November 2023

 

  1.   1
  2.   TSW1418EVM High-Speed Data Capture Card
  3.   Trademarks
  4. 1Introduction
    1. 1.1 REACH Compliance
  5. 2Functionality
    1. 2.1 ADC EVM Data Capture
  6. 3Hardware
    1. 3.1 Power Connections
    2. 3.2 Switches, Push-Buttons, Jumpers, and LEDs
      1. 3.2.1 Switches and Push-Buttons
      2. 3.2.2 Jumpers
      3. 3.2.3 LEDs
        1. 3.2.3.1 Power LED
        2. 3.2.3.2 Status LEDs
    3. 3.3 Connectors
      1. 3.3.1 SMA Connectors
      2. 3.3.2 FPGA Mezzanine Card (FMC) Connector
      3. 3.3.3 JTAG Connector
      4. 3.3.4 USB I/O Connection
  7. 4Software
    1. 4.1 Installation Instructions
    2. 4.2 USB Interface and Drivers
    3. 4.3 Downloading Firmware
  8. 5Revision History

3.2.2 Jumpers

The TSW1418EVM contains several jumpers (JP) that enable certain functions on the board. The description of the jumpers can be found in Table 3-2.

Table 3-2 Jumper Descriptions
Component Description Default
J13 Sets the VADJ voltage level for the FPGA banks to be used with either LVDS or CMOS level inputs. The default setting is for LVDS interface 1 to 2
J10 Power input select. Options are USB interface or test points. Default is USB interface. 2 to 3