SLAU879 December 2022
Figure 3-7 shows the Basic DAC subpage that provides an interface to quickly power up, select the reference and output span, and program the output voltage or current for the respective DACx3004W device. When VDD is applied, the DACx3004W device starts up in Hi-Z power-down mode by default. The Basic DAC subpage also provides controls to configure the GPIO pin on the respective DACx3004W device, and control the two GPIO outputs of the DAC63004WCSP-EVM onboard controller. The register settings can be programmed or retrieved using the Program NVM or Reload NVM checkboxes, respectively.