SLAU902A September   2023  – January 2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Setup
    2. 2.2 AC-MB Settings
      1. 2.2.1 Audio Serial Interface Settings
        1. 2.2.1.1 USB Mode
        2. 2.2.1.2 Optical or Auxiliary Analog Audio Input Mode
        3. 2.2.1.3 External Audio Interface Mode
      2. 2.2.2 AC-MB Power Supply
    3. 2.3 TAx5x12EVM-K Hardware Settings
      1. 2.3.1 TAx5x12 EVM Input Hardware Settings
        1. 2.3.1.1 Line Inputs
        2. 2.3.1.2 On-board Microphone Input
      2. 2.3.2 TAx5x12 EVM Output Hardware Settings
      3. 2.3.3 TAx5x12 Headset Connection
      4. 2.3.4 GPIO1 Hardware Configurations
      5. 2.3.5 GPIO2 Hardware Configurations
      6. 2.3.6 GPI1 Hardware Configurations
      7. 2.3.7 GPO1 Hardware Configurations
      8. 2.3.8 I2C Address Hardware Configurations
      9. 2.3.9 Audio Serial Interface Hardware Configurations
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 PurePath Console 3 Installation
      1. 3.2.1 USB Audio Setup
    3. 3.3 TAx5x12 EVM GUI
      1. 3.3.1 Software Overview
      2. 3.3.2 Configuration View
        1. 3.3.2.1 Device Config Tab
        2. 3.3.2.2 Record Config Tab
        3. 3.3.2.3 Playback Config Tab
        4. 3.3.2.4 Audio Serial Bus Tab
          1. 3.3.2.4.1 Configuring Primary Audio Serial Bus
          2. 3.3.2.4.2 Configuring Secondary Audio Serial Bus
          3. 3.3.2.4.3 Example Configuring I2S Interface
        5. 3.3.2.5 GPIO/Interrupts Tab
        6. 3.3.2.6 Advanced Tabs
          1. 3.3.2.6.1 Programmable Biquads Tab
          2. 3.3.2.6.2 Mixer Tab
          3. 3.3.2.6.3 Limiter Tab
      3. 3.3.3 End System Integration View
      4. 3.3.4 Register Map View
      5. 3.3.5 Preset Configuration
      6. 3.3.6 I2C Monitor View
    4. 3.4 Configuration Examples
    5. 3.5 System Overview
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 TAx5x12 EVM Board Layout
    3. 4.3 Bill of Materials (BOM)
      1. 4.3.1 TAC5212 EVM Bill of Materials
      2. 4.3.2 TAC5112 EVM Bill of Material
      3. 4.3.3 TAD5212 EVM Bill of Materials
      4. 4.3.4 TAA5212 EVM Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks
  12. 6References
  13. 7Revision History

2.3.8 I2C Address Hardware Configurations

Configuring the address of the TAx5x12 device on the EVM is typically not required for evaluation use, however configuring the address is supported by placing jumper on header J75 to either low (ground), low through a resistor, high (pull-up to AVDD) or high to AVDD through resistor. See table below for the different I2C addressing.

Table 2-3 I2C Address Configuration
ADDR Setting Device Address (7-bit addressing) Device Address (8-bit addressing)
Short to Ground 0x50 0xA0
Pull down 4.7KOhm to ground 0x51 0xA2
Pull up 22KOhm to AVDD 0x52 0xA4
Pull up 4.7KOhm to AVDD 0x53 0xA6