SLAU904A October 2023 – December 2023
MD4 and MD5 settings provide the following configuration for these devices as shown in the table below.
MD4, MD5 | TAC5242 | TAC5142 | TAA5242 (ADC only variant) | TAD5242/TAD5142 (DAC only variant) |
---|---|---|---|---|
Target/Controller Mode | Target/Controller Mode | Target/Controller Mode | Target/Controller Mode | |
2'b00 | ADC Diff(AC Coupled with 50 mV CM Tolerance), DAC Diff LO (Highest Performance) | ADC Diff(AC Coupled with 50 mV CM Tolerance), DAC Diff LO (Highest Performance) | ADC Diff(AC Coupled with 50 mV CM Tolerance) | DAC Diff LO (Highest Performance) |
2'b01 | ADC Diff (AC/DC Coupled, Rail to Rail CM Tolerance), DAC Diff (High Drive Load) | ADC Diff (AC/DC Coupled, Rail to Rail CM Tolerance), DAC Diff (High Drive Load) | ADC Diff (AC/DC Coupled, Rail to Rail CM Tolerance) | DAC Diff (High Drive Load) |
2'b10 | ADC SE, DAC SE LO | ADC SE, DAC SE LO | ADC SE | DAC SE LO |
2'b11 | ADC SE , DAC Pseudo Diff HP | ADC SE , DAC Pseudo Diff HP | ADC Diff (Low Power Mode, AC/DC Coupled, Rail to Rail CM Tolerance) | DAC Pseudo Diff HP |