SLAZ157J October   2012  – May 2021 MSP430F2101

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      DGV20
      2.      PW20
      3.      DW20
      4.      RGE24
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL6
    2. 6.2  BCL8
    3. 6.3  BCL9
    4. 6.4  BCL10
    5. 6.5  BCL11
    6. 6.6  BCL12
    7. 6.7  BCL13
    8. 6.8  BCL14
    9. 6.9  BSL5
    10. 6.10 CPU4
    11. 6.11 CPU5
    12. 6.12 CPU6
    13. 6.13 CPU11
    14. 6.14 CPU12
    15. 6.15 CPU13
    16. 6.16 CPU14
    17. 6.17 CPU19
    18. 6.18 CPU45
    19. 6.19 EEM20
    20. 6.20 FLASH16
    21. 6.21 FLASH17
    22. 6.22 FLASH18
    23. 6.23 FLASH19
    24. 6.24 FLASH20
    25. 6.25 FLASH22
    26. 6.26 FLASH24
    27. 6.27 FLASH27
    28. 6.28 FLASH36
    29. 6.29 JTAG15
    30. 6.30 PORT8
    31. 6.31 PORT10
    32. 6.32 SYS15
    33. 6.33 TA12
    34. 6.34 TA16
    35. 6.35 TA21
    36. 6.36 TAB22
    37. 6.37 XOSC5
    38. 6.38 XOSC8
  7. 7Revision History

6.27 FLASH27

FLASH Module

Category

Functional

Function

EEI feature can disrupt segment erase

Description

When a flash segment erase operation is active with EEI feature selected (EEI=1 in FLCTL1) and GIE=0, the following can occur:

An interrupt event causes the flash erase to be stopped, and the flash controller expects an RETI to resume the erase. Because GIE=0, interrupts are not serviced and RETI will never happen.

Workaround

1) Do not set bit EEI=1 when GIE = 0.
or,
2) Force an RETI instruction during the erase operation during the check for BUSY=1 (FCLTL3).

Sample code:

        MOV R5, 0(R5) ; Dummy write, erase segment
LOOP: BIT #BUSY, &FCTL3 ; test busy bit
       JMP SUB_RETI ; Force RETI instruction
        JNZ LOOP ; loop while BUSY=1

SUB_RETI: PUSH SR
          RETI