SLAZ163N October   2012  – May 2021 MSP430F2132 , MSP430F2132-EP

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      RHB32
      2.      PW28
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL12
    2. 6.2  BCL13
    3. 6.3  BCL16
    4. 6.4  CPU19
    5. 6.5  EEM20
    6. 6.6  FLASH19
    7. 6.7  FLASH24
    8. 6.8  FLASH27
    9. 6.9  FLASH36
    10. 6.10 PORT12
    11. 6.11 SYS15
    12. 6.12 TA12
    13. 6.13 TA16
    14. 6.14 TA21
    15. 6.15 TAB22
    16. 6.16 USCI20
    17. 6.17 USCI21
    18. 6.18 USCI22
    19. 6.19 USCI23
    20. 6.20 USCI24
    21. 6.21 USCI25
    22. 6.22 USCI26
    23. 6.23 USCI28
    24. 6.24 USCI30
    25. 6.25 USCI34
    26. 6.26 USCI35
    27. 6.27 USCI40
    28. 6.28 XOSC5
    29. 6.29 XOSC8
  7. 7Revision History

6.18 USCI22

USCI Module

Category

Functional

Function

I2C Master Receiver with 10-bit slave addressing

Description

Unexpected behavior of the USCI_B can occur when configured in I2C master receive mode with 10-bit slave addressing under the following conditions:

1) The USCI sends first byte of slave address, the slave sends an ACK and when second address byte is sent, the slave sends a NACK.
2) Master sends a repeat start condition (If UCTXSTT=1).
3) The first address byte following the repeated start is acknowledged.

However, the second address byte is not sent, instead the Master incorrectly starts to receive data and sets UCBxRXIFG=1.

Workaround

Do not use repeated start condition instead set the stop condition UCTXSTP=1 in the NACK ISR prior to the following start condition (USTXSTT=1).