SLAZ168O October 2012 – May 2021 MSP430F2272 , MSP430F2272-Q1
JTAG Module
Debug
Releasing JTAG control can corrupt CPU registers during debug
During a debug session, on rare occasions, the CPU register contents can get corrupted when JTAG control is released by the debugger. This behavior is exhibited during, but not limited to, the use of the "Use Virtual Breakpoints" and "Force Single Stepping" features in the IAR Embedded Workbench software. This bug does not affect normal device and application operation, such as starting a device out of POR and executing application code.
In order for the bug to occur, both of the following two conditions must be true:
1.- The CPU (MCLK) is sourced by the DCO.
2.- The "External Resistor (Rosc)" feature of the DCO is not used.
Use an external crystal or a digital high-speed clock source connected to the LFXT1 oscillator to source the CPU (MCLK) during a debug session. Alternatively, use the on-chip DCO in the "External Resistor (Rosc)" configuration. Note that, in this case, an external resistor connected to the device Rosc pin is mandatory, and that the factory-programmed DCO calibration constants cannot be applied directly.