SLAZ201I October   2012  – May 2021 MSP430F427

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PM64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  CPU4
    2. 6.2  EEM20
    3. 6.3  ESP1
    4. 6.4  ESP2
    5. 6.5  ESP3
    6. 6.6  ESP4
    7. 6.7  ESP5
    8. 6.8  FLL3
    9. 6.9  MPY2
    10. 6.10 SD1
    11. 6.11 SD2
    12. 6.12 TA12
    13. 6.13 TA16
    14. 6.14 TA21
    15. 6.15 TAB22
    16. 6.16 US15
    17. 6.17 WDG2
  7. 7Revision History

6.10 SD1

SD Module

Category

Functional

Function

Reduced SINAD performance if SD16 clock source is greater than 6 MHz

Description

If the frequency of the SD16 input clock source is greater than 6 MHz, the performance of the SD16 may be degraded due to noise influencing the analog measurements under reduced SINAD.

Workaround

Writing 0x48 to memory location 0xBF configures the SD16 for optimized performance at input clock frequencies greater than 6 MHz.
Include the following code:
*(unsigned char*) 0xBF=0x48; // Write value 0x48 to memory address 0xBF