SLAZ281AA October 2012 – May 2021 MSP430F5419
PORT Module
Functional
GPIO pins set to high impedance on exit from LPM2/3/4
When automatic SVS control is enabled (SVSMHACE or SVSMLACEare set), all I/O's are set to high impedance state after wakeup from LPM 2/3/4. The duration of this high impedance state is between 10 and 100us. All input, output and pull resistor settings are not applied during this time.
None.