Advisories that affect the device's operation, function, or parametrics.
✓ The check mark indicates that the issue is present in the specified revision.
Errata Number | Rev K | Rev I | Rev H | Rev G | Rev F | Rev E | Rev D | Rev C |
---|---|---|---|---|---|---|---|---|
ADC25 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
ADC27 | ✓ | ✓ | ✓ | |||||
ADC29 | ✓ | |||||||
ADC42 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
ADC69 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
COMP10 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU37 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU47 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
DMA4 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
DMA7 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
DMA8 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
DMA10 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
FLASH33 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
FLASH34 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
FLASH35 | ✓ | ✓ | ||||||
FLASH37 | ✓ | ✓ | ✓ | |||||
MPY1 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PMAP1 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PMM9 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PMM10 | ✓ | ✓ | ✓ | |||||
PMM11 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PMM12 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PMM14 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PMM15 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PMM17 | ✓ | ✓ | ✓ | |||||
PMM18 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PMM20 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PORT15 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PORT16 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PORT19 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
PORT24 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
RTC3 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
RTC6 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
SYS10 | ✓ | ✓ | ✓ | |||||
SYS12 | ✓ | ✓ | ✓ | |||||
SYS14 | ✓ | ✓ | ✓ | |||||
SYS16 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
SYS18 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
TAB23 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
USB4 | ✓ | ✓ | ✓ | |||||
USB6 | ✓ | ✓ | ✓ | |||||
USB8 | ✓ | ✓ | ✓ | |||||
USB9 | ✓ | ✓ | ✓ | ✓ | ✓ | |||
USB10 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
USB11 | ✓ | |||||||
USB12 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
USB13 | ✓ | |||||||
USCI26 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
USCI30 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
USCI31 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
USCI34 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
USCI35 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
USCI39 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
USCI40 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
WDG4 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
Advisories that affect only debug operation.
✓ The check mark indicates that the issue is present in the specified revision.
Advisories that are resolved by compiler workaround. Refer to each advisory for the IDE and compiler versions with a workaround.
✓ The check mark indicates that the issue is present in the specified revision.
Errata Number | Rev K | Rev I | Rev H | Rev G | Rev F | Rev E | Rev D | Rev C |
---|---|---|---|---|---|---|---|---|
CPU21 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU22 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU23 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU26 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU27 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU28 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU29 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU30 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU31 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU32 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU33 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU34 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU35 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU39 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
CPU40 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
Refer to the following MSP430 compiler documentation for more details about the CPU bugs workarounds.
TI MSP430 Compiler Tools (Code Composer Studio IDE)
MSP430 GNU Compiler (MSP430-GCC)
IAR Embedded Workbench
The revision of the device can be identified by the revision letter on the Package Markings or by the HW_ID located inside the TLV structure of the device.
To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all MSP MCU devices. Each MSP MCU commercial family member has one of two prefixes: MSP or XMS. These prefixes represent evolutionary stages of product development from engineering prototypes (XMS) through fully qualified production devices (MSP).
XMS – Experimental device that is not necessarily representative of the final device's electrical specifications
MSP – Fully qualified production device
Support tool naming prefixes:
X: Development-support product that has not yet completed Texas Instruments internal qualification testing.
null: Fully-qualified development-support product.
XMS devices and X development-support tools are shipped against the following disclaimer:
"Developmental product is intended for internal evaluation purposes."
MSP devices have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies.
Predictions show that prototype devices (XMS) have a greater failure rate than the standard production devices. TI recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.
TI device nomenclature also includes a suffix with the device family name. This suffix indicates the temperature range, package type, and distribution format.
LQFP (PN), 80 Pin
Die Revision | TLV Hardware Revision |
---|---|
Rev K | 19h |
Rev I | 18h |
Rev H | 17h |
Rev G | 16h |
Rev F | 15h |
Rev E | 14h |
Rev D | 13h |
Rev C | 12h |
Further guidance on how to locate the TLV structure and read out the HW_ID can be found in the device User's Guide.
ADC Module
Functional
Write to ADC12CTL0 triggers ADC12 when CONSEQ = 00
If ADC conversions are triggered by the Timer_B module and the ADC12 is in single-channel single-conversion mode (CONSEQ = 00), ADC sampling is enabled by write access to any bit(s) in the ADC12CTL0 register. This is contrary to the expected behavior that only the ADC12 enable conversion bit (ADC12ENC) triggers a new ADC12 sample.
When operating the ADC12 in CONSEQ=00 and a Timer_B output is selected as the sample and hold source, temporarily clear the ADC12ENC bit before writing to other bits in the ADC12CTL0 register. The following capture trigger can then be re-enabled by setting ADC12ENC = 1.
ADC Module
Functional
Integral and differential non-linearity exceed specifications
The ADC12_A integral and differential non-linearity may exceed the limits specified in the data sheet under the following conditions:
- If the internal voltage reference generator is used
and
- If the reference voltage is not buffered off-chip
and
- If fADC12CLK > 2.7 MHz
The non-linearity can be up to tens of LSBs. This is due to the internal reference buffer providing insufficient drive for the switched capacitor array of the ADC12_A.
(1) Turn on the output of the internal voltage reference to increase the drive strength of the reference to the ADC_12 core:
- If REFMSTR bit in REFCTL0 is 0 (allowing Shared REF to be controlled by ADC_A reference control bits)
Set ADC12REFON bit in ADC12CTL0 = 1
and
Set ADC12REFOUT bit in ADC12CTL2 = 1
- If REFMSTR bit in REFCTL0 is 1
Set REFON and REFOUT bits in REFCTL0 = 1
OR
(2) Ensure fADC12CLK < 2.7 MHz. Depending on the frequency of the source of fADC12CLK (ACLK, MCLK, SMCLK, or MODOSC), select the divider bits accordingly.
- If fADC12CLK = MODOSC
(ADC12OSC) ADC12CTL1 |= ADC12DIV_1; // Divide clock by 2
- If fADC12CLK = ACLK/SMCLK/MCLK > 2.7 MHz.
Use ADC12DIVx and/or ADC12PDIVx bits to reduce the selected clock frequency to between 0.45 MHz and 2.7 MHz.
ADC Module
Functional
Incorrect temperature sensor calibration data
In some devices, the internal temperature sensor calibration data for 30 degC are invalid for all VRef conditions. Devices with correct calibration data show a difference of at least 30 LSBs between the different VRef conditions. When using incorrect calibration data with the internal temperature sensor ADC samples, the calculated results can be unreliable. Calibration data for 85 degC are not affected.
MSP430F552x/551x/532x/524x silicon revision E devices with the lot trace code beyond 0BCVXPK are not affected by this erratum.
Recalibrate the temperature sensor for 30 degC at the application level.
ADC Module
Functional
ADC stops converting when successive ADC is triggered before the previous conversion ends
Subsequent ADC conversions are halted if a new ADC conversion is triggered while ADC is busy. ADC conversions are triggered manually or by a timer. The affected ADC modes are:
- sequence-of-channels
- repeat-single-channel
- repeat-sequence-of-channels (ADC12CTL1.ADC12CONSEQx)
In addition, the timer overflow flag cannot be used to detect an overflow (ADC12IFGR2.ADC12TOVIFG).
1. For manual trigger mode (ADC12CTL0.ADC12SC), ensure each ADC conversion is completed by first checking ADC12CTL1.ADC12BUSY bit before starting a new conversion.
2. For timer trigger mode (ADC12CTL1.ADC12SHP), ensure the timer period is greater than the ADC sample and conversion time.
To recover the conversion halt:
1. Disable ADC module (ADC12CTL0.ADC12ENC = 0 and ADC12CTL0.ADC12ON = 0)
2. Re-enable ADC module (ADC12CTL0.ADC12ON = 1 and ADC12CTL0.ADC12ENC = 1)
3. Re-enable conversion