SLAZ441K March   2013  – May 2021 MSP430G2955

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      DA38
      2.      RHA40
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL12
    2. 6.2  CPU4
    3. 6.3  SYS15
    4. 6.4  TA12
    5. 6.5  TA16
    6. 6.6  TA21
    7. 6.7  TAB22
    8. 6.8  TAB26
    9. 6.9  TAB26
    10. 6.10 TB2
    11. 6.11 TB16
    12. 6.12 TB24
    13. 6.13 USCI20
    14. 6.14 USCI22
    15. 6.15 USCI23
    16. 6.16 USCI24
    17. 6.17 USCI25
    18. 6.18 USCI26
    19. 6.19 USCI29
    20. 6.20 USCI30
    21. 6.21 USCI34
    22. 6.22 USCI35
    23. 6.23 USCI40
    24. 6.24 XOSC5
  7. 7Revision History

6.22 USCI35

USCI Module

Category

Functional

Function

Violation of setup and hold times for (repeated) start in I2C master mode

Description

In I2C master mode, the setup and hold times for a (repeated) START, tSU,STA and tHD,STA respectively, can be violated if SCL clock frequency is greater than 50kHz in standard mode (100kbps). As a result, a slave can receive incorrect data or the I2C bus can be stalled due to clock stretching by the slave.

Workaround

If using repeated start, ensure SCL clock frequencies is < 50kHz in I2C standard mode (100 kbps).