SLAZ441K March 2013 – May 2021 MSP430G2955
USCI Module
Functional
Timing of USCI I2C interrupts may result in call to a reserved ISR location
When certain USCI I2C interrupt flags (IFG) are set and an automatic flag-clearing event on the I2C bus occurs, the device makes a call to the TRAPINT interrupt vector. This will only happen if the IFG is cleared within a critical time window (~6 CPU clock cycles) after a USCI interrupt request occurs and before the interrupt servicing is initiated. The affected interrupts are UCBxTXIFG, UCSTPIFG, UCSTTIFG and UCNACKIFG.
The automatic flag-clearing scenarios are described in the following situations:
(1) A pending UCBxTXIFG interrupt request is cleared on the falling SCL clock edge following a NACK.
(2) A pending UCSTPIFG, UCSTTIFG, or UCNACKIFG interrupt request is cleared by a following Start condition.
(1) Poll the affected flags instead of enabling the interrupts.
(2) Define an ISR for the interrupt vector TRAPINT. If the failure condition occurs; a call to the TRAPINT ISR is made. After the interrupt is serviced, the device returns to the application code and continues execution.
Include the following ISR definition in the application code.
#pragma vector= TRAPINT_VECTOR
__interrupt void TRAPINT_ISR(void)
{
__no_operation();
}