SLAZ480AD December   2012  – May 2021 MSP430F6768

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PEU128
      2.      PZ100
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC39
    2. 6.2  ADC42
    3. 6.3  ADC69
    4. 6.4  AES1
    5. 6.5  AUXPMM1
    6. 6.6  AUXPMM2
    7. 6.7  BSL7
    8. 6.8  BSL14
    9. 6.9  COMP10
    10. 6.10 CPU21
    11. 6.11 CPU22
    12. 6.12 CPU36
    13. 6.13 CPU37
    14. 6.14 CPU40
    15. 6.15 CPU46
    16. 6.16 CPU47
    17. 6.17 DMA4
    18. 6.18 DMA7
    19. 6.19 DMA9
    20. 6.20 DMA10
    21. 6.21 EEM17
    22. 6.22 EEM19
    23. 6.23 EEM23
    24. 6.24 JTAG26
    25. 6.25 JTAG27
    26. 6.26 LCDB6
    27. 6.27 PMM11
    28. 6.28 PMM12
    29. 6.29 PMM14
    30. 6.30 PMM15
    31. 6.31 PMM18
    32. 6.32 PMM20
    33. 6.33 PMM26
    34. 6.34 PORT15
    35. 6.35 PORT19
    36. 6.36 PORT26
    37. 6.37 RTC8
    38. 6.38 SD3
    39. 6.39 SYS16
    40. 6.40 UCS11
    41. 6.41 USCI36
    42. 6.42 USCI37
    43. 6.43 USCI41
    44. 6.44 USCI42
    45. 6.45 USCI47
    46. 6.46 USCI50
  7. 7Revision History

6.31 PMM18

PMM Module

Category

Functional

Function

PMM supply overvoltage protection falsely triggers POR

Description

The PMM Supply Voltage Monitor (SVM) high side can be configured as overvoltage protection (OVP) using the SVMHOVPE bit of SVSMHCTL register. In this mode a POR should typically be triggered when DVCC reaches ~3.75V.
If the OVP feature of SVM high side is enabled going into LPM234, the SVM might trigger at DVCC voltages below 3.6V (~3.5V) within a few ns after wake-up. This can falsely cause an OVP-triggered POR. The OVP level is temperature sensitive during fail scenario and decreases with higher temperature (85 degC ~3.2V).

Workaround

Use automatic control mode for high-side SVS & SVM (SVSMHCTL.SVSMHACE=1). The SVM high side is inactive in LPM2, LPM3, and LPM4.