SLAZ741A march   2023  – april 2023 MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1305 , MSPM0L1306 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346

 

  1.   Abstract
  2. 1Functional Advisories
  3. 2Preprogrammed Software Advisories
  4. 3Debug Only Advisories
  5. 4Fixed by Compiler Advisories
  6. 5Device Nomenclature
    1. 5.1 Device Symbolization and Revision Identification
  7. 6Advisory Descriptions
    1. 6.1  ADC_ERR_01
    2. 6.2  ADC_ERR_02
    3. 6.3  COMP_ERR_01
    4. 6.4  GPIO_ERR_01
    5. 6.5  I2C_ERR_01
    6. 6.6  IO_ERR_01
    7. 6.7  PMCU_ERR_01
    8. 6.8  PMCU_ERR_02
    9. 6.9  PMCU_ERR_03
    10. 6.10 PWREN_ERR_01
    11. 6.11 SPI_ERR_01
    12. 6.12 SYSOSC_ERR_01
  8. 7Revision History

6.10 PWREN_ERR_01

Peripheral registers are still accessible after disabling PWREN register

Revisions Affected

Rev C

Details

When disabling the power of a peripheral by setting the PWREN register to 0, the peripheral’s registers may appear to retain data values if read. Reading or writing to the registers when PWREN is 0 has no affect as the peripheral has no effect.

The following peripherals are affected: comparator (COMP), operational amplifier (OPA), TimerA, TimerG, general-purpose input/output (GPIO), and windowed watchdog timer (WWDT).

Workaround

When the PWREN register of the peripheral is set to 0, the values of the associated registers should be disregarded or considered invalid.