SLLA656 November   2024 TUSB1021-Q1 , TUSB521-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2TUSB521-Q1 Equalization Selection
  6. 3TUSB1021-Q1 Equalization Selection
  7. 4TUSB521-Q1 Placement Example
  8. 5TUSB521-Q1 Configuration Example
  9. 6Layout Guidelines
    1. 6.1 Ground Stitching
    2. 6.2 AC Coupling and Resistor Placement
  10. 7Summary
  11. 8References

TUSB1021-Q1 Equalization Selection

For the TUSB1021-Q1, the same means of selecting which EQ settings to use still applies, with differences being in how much loss to expect per inch at 10Gbps with USB3.1 Gen 2 in Table 3-3, and how much loss the TUSB1021-Q1 can compensate for with the EQ settings in Table 3-2.

Table 3-1 Example FR4 Trace Loss at 10Gbps
FR4 PCB Trace Length (Inches)Loss at 5GHz (dB)
10.9
21.7
32.6
43.5
54.3
65.2
76.1
87
97.8
108.7
119.6
1210.4
1311.3
1412.2
Table 3-2 TUSB1021-Q1 Receiver Equalization GPIO Control
EQUALIZATION
SETTING #
RX1 and RX2 PORTSSSTX PORT
EQ1 PIN LEVELEQ0 PIN LEVELEQ GAIN AT 5GHz (dB)SSEQ1 PIN LEVELSSEQ0 PIN LEVELEQ GAIN AT 5GHz (dB)
0000.400–2.4
10R2.60R–0.2
20F4.20F1.3
3015.7012.8
4R06.7R03.8
5RR7.9RR4.9
6RF8.7RF5.8
7R19.5R16.6
8F010.2F07.3
9FR10.9FR7.9
10FF11.4FF8.4
11F111.9F18.9
121012.2109.3
131R12.61R9.7
141F12.91F10.0
151113.31110.5