This user's guide presents a typical laboratory setup used with this EVM.

Exceeding the specified input voltage range and applying loads outside the specified output range may cause unexpected operation and irreversible damage to the EVM. If there is uncertainty as to the input voltage range, power specifications, or about using a configuration that is or is not described in this user guide, please contact a TI field representative or create a post on e2e.ti.com prior to connecting power.

This section describes the setup and operation of the EVM for parameter-performance evaluation. The EVM is configured for a 24 V input and an unregulated 15 V output. It comes with an SN6507DGQ unit installed in place of U2 and a 24 V IN to 15 V, 500 mA OUT transformer in place of T1. This EVM can also be configured for evaluation of various transformers and voltage input and output combinations by replacing the included push-pull transformer device in place of T1. A list of recommended commercially available transformers is listed in the SN6507 datasheet.

Figure 3-1 shows the basic setup of the EVM with an input power supply needed to evaluate device performance. Power this Evaluation Module by connecting a voltage to VIN that is within the Recommended Operating Range in the SN6507 device datasheet. Typical voltage levels for the VIN are 24 V and 12 V, respectively. Both grounds of the EVM may be shorted together for evaluation. In practice, shorting the non-isolated and isolated grounds would bypass the isolation barrier and is not recommended.

Figure 3-1 Basic SN6507DGQEVM Operation

The pin diagram of SN6507 in the DGQ package is shown in Figure 4-1.

The SN6507DGQEVM is designed for flexibility in evaluation of the SN6507 device by providing placeholder options for several external components. The SN6507 pin-configurable options, snubber circuit components, full-bridge output configurations, LDO output, and the isolation transformer itself may all be adjusted using component-footprint and jumper provisions on this EVM. The transformer footprint, T1, is compatible with many commercially-available push-pull isolation transformers. The EVM PCB is shown in Figure 4-2.

Figure 4-2 SN6507DGQEVM Top View

Details for the various configuration options of the SN6507 EVM are listed below.

Pin-configurations using RCs: Configuration options for pin-adjustable features of SN6507, including Enable, UVLO, SW1/SW2 switching frequency (CLK), duty cycle control, slew rate adjustment, soft-start time, and over-current protection limit can be found in the SN6507 data sheet. Corresponding component footprints on this EVM are as follows:

• Ruv1 and Ruv2 correspond to RENT and RENB for UVLO and EN programming

• RDC is used for duty cycle control programming and is active when pins 2-3 of J13 are connected. If duty cycle control is used, ensure a compatible transformer is placed in footprint T1 and output inductors with sufficient inductance are populated in place of L1 (and L2 as needed)

• RCLK can be used to program the internal CLK and is active when pins 3-4 of J10 are connected

• RSR is used to adjust the slew rate of the switching pins, SW1 and SW2, and is active when pins 2-3 of J9 are connected

• Rilim is used to adjust the over-current protection limit of SN6507

• Css is used to adjust the soft start time of SN6507 during power-up

Transformer replacement: A 24 V IN to 15 V OUT transformer is included by default in place of T1. To evaluate different transformers, de-solder this transformer and replace it with a 6-pin or 8-pin push-pull transformer that is compatible with the T1 footprint.

Secondary-side snubber circuit: An RC snubber circuit of 100 Ω, 62pF is populated on R12, C15 and R13, C16 by default to help minimize electromagnetic emissions. These components are optional, so they may be replaced with other components or removed from the EVM and excluded from designs using the SN6507 device.

Primary-side snubber circuits: Primary-side snubber circuits can be placed using footprints for R10, C11 and R11, C12 to further reduce emissions. Primary-side snubber circuit values can be calculated using the steps in How to Reduce Emissions in Push-Pull Isolated Power Supplies (SLLA566).

Output rectifier: Diode placeholders D1, D2, D4, D5, and resistor R9 are included to allow system designers to experiment with the different output topologies push-pull power supplies can support. D2 and D5 are populated by default as this is the typical application topology, and some example output designs found in the SN6507 data sheet can be configured on this EVM to achieve bi-polar or voltage-doubling outputs using the “-Vout” net by populating D1 and D4 on the EVM. Make sure the output LDO, U1, is bypassed by disconnecting pins 1-2 of J4 if R9 is removed since the ISO_GND potential will be floating.

Ferrite bead options: To reduce emissions when power supply outputs are connected to long cables or have high ringing, ferrites can be soldered in place of R15, R14, R6, R7, and R8. A ferrite with 1 kΩ impedance or greater at 100 MHz like the Würth Elektroniks 742792662 is recommended.

Input-side transient protection: Provisions for a flat-clamp diode like TVS3300, U3, or a TVS diode like SMAJ36A, D7, are included to protect the power supply input from external transients above the desired power supply level.

Output-side transient protections: TVS diode placeholders D3 and D6 are included to protect the SN6507 output from external transients above the desired output power supply level.

LDO output: The included LM317A can be configured to change the regulated output voltage level by connecting either of the R5x resistors using jumper J3. When configuring the LDO, ensure the LDO input voltage is within the LDO’s recommended limits and high enough to support the desired output voltage level and the dropout voltage of the LM317A. A regulated 15 V output can be configured by connecting pins 1-2 of J3, a regulated 12 V output can be configured by connecting pins 2-3 of J3, or a custom output voltage value can be configured by connecting pins 5-6 of J3 and changing R5C to a value which meets the desired output voltage using Equation 1.

A table of calculated resistor values for R5C to achieve common voltage outputs is shown Table 4-1:

Jumper configurations:Table 4-2 details the jumper configuration information of the SN6507DGQEVM.

Table 5-1 lists the bill of materials (BOM) for SN6507DGQEVM.

Figure 6-1 shows the schematic diagram for this EVM, and Figure 6-2 and Figure 6-3 show the printed circuit board (PCB) layout.

Figure 6-1 SN6507DGQEVM Schematic

Figure 6-2 SN6507DGQEVM Top PCB Layout

Figure 6-3 SN6507DGQEVM Bottom PCB Layout