SLLU377 April   2024 TUSB521-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Setup
    2. 2.2 Equalization Control
  8. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  9. 4Additional Information
    1. 4.1 Trademarks

Equalization Control

Equalization (EQ) can be controlled using I2C or pin-strapping. Each of the TUSB521-Q1 receiver lanes has individual controls for receiver equalization (see Configuration Pin-Level Definitions). Table 3-3 list the gain values of each available combination of downstream and upstream configurations.

Table 2-2 Configuration Pin-Level Definitions
Level Settings
0 Option 1: Tie 1kΩ 5% to GND
Option 2: Tie directly to GND
R Tie 20kΩ 5% to GND
F Float (leave pin open)
1 Option 1: Tie 1kΩ 5% to VCC
Option 2: Tie directly to VCC

The EQ0/1 Pins affect the receiver EQ setting of the upstream-facing RX1 and RX2 Ports, while the SSEQ0/1 Pins affect the receiver EQ setting of the downstream-facing SSTX Port.

Table 2-3 USB 3.1 Equalization Settings
EQ Setting # USB 3.2 Downstream Facing Ports USB 3.2 Upstream Facing Ports
EQ1 EQ0 EQ Gain at 2.5GHz (dB) SSEQ1 SSEQ0 EQ Gain at 2.5GHz (dB)
0 0 0 -0.9 0 0 -2.4
1 0 R 0.2 0 R -1.3
2 0 F 1.2 0 F -0.4
3 0 1 2.2 0 1 0.7
4 R 0 3.1 R 0 1.5
5 R R 4.0 R R 2.5
6 R F 4.8 R F 3.2
7 R 1 5.6 R 1 4.0
8 F 0 6.3 F 0 4.8
9 F R 7.0 F R 5.5
10 F F 7.5 F F 6.0
11 F 1 8.1 F 1 6.6
12 1 0 8.5 1 0 7.1
13 1 R 9.1 1 R 7.6
14 1 F 9.5 1 F 8.0
15 1 1 9.9 1 1 8.5