SLLU385A July   2024  – September 2024

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1.     Jumper Information
    2. 2.1 EVM Setup and Operation
      1. 2.1.1 Overview and Basic Operation Settings
        1. 2.1.1.1  VCC Power Supply (J3, P2, TP10)
        2. 2.1.1.2  I/O Power Supply VIO or VRXD (J3, J8, P1,or TP9)
        3. 2.1.1.3  Main Supply and I/O Header (J3)
        4. 2.1.1.4  TXD Input (J3 or TP5)
        5. 2.1.1.5  RXD Output (J3 or TP6)
        6. 2.1.1.6  Generic Pin 8 (J2, J3, or TP3)
        7. 2.1.1.7  Pin 8 - J2 Configurations (3-Way Jumper)
        8. 2.1.1.8  TP3 Configuration
        9. 2.1.1.9  Generic Pin 5 (J1, J3 or TP1)
        10. 2.1.1.10 Pin 5 – J1 Configurations (4-Way Jumper)
        11. 2.1.1.11 TP1 Configuration
        12. 2.1.1.12 J8 Configuration
        13. 2.1.1.13 SIC Network Configuration (J4 & J5)
      2. 2.1.2 Using CAN Bus Load, Termination, and Protection Configurations
      3. 2.1.3 Using Customer Installable I/O Options for Current Limiting, Pullup and Pulldown, Noise Filtering
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks
  9. 5Revision History

2.1.1.2 I/O Power Supply VIO or VRXD (J3, J8, P1,or TP9)

For devices with I/O level shifting, a second supply pin for the I/O or RXD pin is on pin 5 of the transceiver device. A second power supply is needed to test one of these devices. Power can be supplied to this pin by either shunting VCC and VIO together via J8, or connecting a separate power supply via J3, P1 banana jack, or TP8. Install a local buffering and decoupling capacitor at C10 if the EVM is used for one of these devices.