SLLU385A July   2024  – September 2024

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1.     Jumper Information
    2. 2.1 EVM Setup and Operation
      1. 2.1.1 Overview and Basic Operation Settings
        1. 2.1.1.1  VCC Power Supply (J3, P2, TP10)
        2. 2.1.1.2  I/O Power Supply VIO or VRXD (J3, J8, P1,or TP9)
        3. 2.1.1.3  Main Supply and I/O Header (J3)
        4. 2.1.1.4  TXD Input (J3 or TP5)
        5. 2.1.1.5  RXD Output (J3 or TP6)
        6. 2.1.1.6  Generic Pin 8 (J2, J3, or TP3)
        7. 2.1.1.7  Pin 8 - J2 Configurations (3-Way Jumper)
        8. 2.1.1.8  TP3 Configuration
        9. 2.1.1.9  Generic Pin 5 (J1, J3 or TP1)
        10. 2.1.1.10 Pin 5 – J1 Configurations (4-Way Jumper)
        11. 2.1.1.11 TP1 Configuration
        12. 2.1.1.12 J8 Configuration
        13. 2.1.1.13 SIC Network Configuration (J4 & J5)
      2. 2.1.2 Using CAN Bus Load, Termination, and Protection Configurations
      3. 2.1.3 Using Customer Installable I/O Options for Current Limiting, Pullup and Pulldown, Noise Filtering
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks
  9. 5Revision History

2.1.1.3 Main Supply and I/O Header (J3)

All key I/O and supply GND functions are brought to this header. This header can be used on either interface to test equipment or a short cable can be made to connect to an existing customer-application board with a CAN controller.

Table 2-2 J3 Pin Definitions
PinConnectionDescription
1VCCPin 3 of transceiver, VCC

3

VIO

Supports level-shifting functions of devices with VIO or VRXD pin

5

P5

Generic pin 5 of transceiver, various functions depending on transceiver, examples: VREF, SPLIT, VRXD, VIO, LBK, EN, AB, SHDN, FAULT and No Connect (NC)

7

P8

Generic pin 8 of transceiver, normally used for mode control, examples: RS, SW, S, STB and No Connect (NC)

9

RXDPin 4 of transceiver, RXD (receive data)

11

TXD

Pin 1 of transceiver, TXD (transmit data)

2

GND

Pin 2 of transceiver, GND

4

6

8

10

12

This header is arranged to provide a separate ground for each signal pair (TXD/GND and RXD/GND). If the EVM is being used with lab equipment, connect separate cables to these main points via simple 2-pin header connectors. If connecting the board to a processor-based system, connect a single cable with all power and signals via a 12-pin header cable to this port.