SLLU388 November   2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1  Power Requirements
    2. 2.2  Setup
      1. 2.2.1 Power Management Setup
      2. 2.2.2 Transceiver Options
      3. 2.2.3 Special Use Pin Options
      4. 2.2.4 Potential Board Modifications
    3. 2.3  Header, Jumper, and other Interface Information
    4. 2.4  Switch Information
    5. 2.5  Resistor Information
    6. 2.6  Inductance Information
    7. 2.7  Capacitor Information
    8. 2.8  Diode Information
    9. 2.9  Transistor Information
    10. 2.10 IC and Misc. Component Information
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
    3. 3.3 Software Development
    4. 3.4 Programming Options
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1. 5.1 Trademarks
    2. 5.2 Related Documentation

1.4 Device Information

The TCAN284xx-Q1 is a family of system basis chips (SBC) that provide a control area network flexible data rate capable (CAN FD) transceiver that supports selective wake. The TCAN2847x-Q1 includes a local interconnect network (LIN) transceiver. The CAN FD transceiver supports data rates up to 5Mbps while the LIN transceiver supports fast mode data rates up to 200kbps. The VCC1 LDO provides 3.3V or 5V ±2% with up to 250mA of current and determines the digital IO logic values. If more current is needed an external PNP transistor can be used to support up to 350mA and voltages of 1.8V, 2.5V, 3.3V or 5V. VCC2 LDO provides 5V up to 200mA.

The TCAN284xx-Q1 includes features such as LIMP, three local wake inputs and four high side switches. The high side switch can be on/off, 10-bit PWM or timer controlled. Using the GFO pin, the user can control an external CAN FD, LIN transceiver, CAN SBC or LIN SBC. The WAKE pins can be configured for static sensing, cyclic sensing (with HSS4 pin) and pulse based for waking up. These devices provide EEPROM to store specific device configuration information. Thus, avoiding extensive reprogramming after power fluctuations. WAKE1 and WAKE2 can enable an internal switch between pins to enable external VBAT monitoring. WAKE3 can be configured as a direct drive control pin for any combinations of high-side switches when cyclic sensing wake is enabled.