SLOS265E August   1999  – March 2024

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: THS4021
    5. 5.5 Thermal Information: THS4022
    6. 5.6 Electrical Characteristics: THS4021D and THS4022DGN
    7. 5.7 Electrical Characteristics: THS4021DGN
    8. 5.8 Typical Characteristics: THS4021D and THS4022DGN
    9. 5.9 Typical Characteristics: THS4021DGN
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Offset Nulling
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving a Capacitive Load
      2. 7.1.2 General Configuration
    2. 7.2 Power Supply Recommendations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
        1. 7.3.1.1 General PowerPAD™ Integrated Circuit Package Design Considerations
      2. 7.3.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.6 Electrical Characteristics: THS4021D and THS4022DGN

at TA = 25°C, VCC = ±15 V, and RL = 150 Ω (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DYNAMIC PERFORMANCE
BW Small-signal bandwidth
(–3 dB)		 Gain = 10 VCC = ±15 V 290 MHz
VCC = ±5 V 250
Gain = 20 VCC = ±15 V 110
VCC = ±5 V 100
Bandwidth for 0.1-dB flatness Gain = 10 VCC = ±15 V 17
VCC = ±5 V 17
Full-power bandwidth(1) VO(pp) = 20 V, VCC = ±15 V 7.5
VO(pp) = 5 V, VCC = ±5 V 23.6
SR Slew rate(2) Gain = 10 VCC = ±15 V, 20-V step 470 V/µs
VCC = ±5 V, 5-V step 370
ts Settling time to 0.1% Gain = –10 VCC = ±15 V, 5-V step 30 ns
VCC = ±5 V, 2-V step 30
Settling time to 0.01% Gain = –10 VCC = ±15 V, 5-V step 160
VCC = ±5 V, 2-V step 160
THD+N Total harmonic distortion + noise Gain = 10, f = 1 kHz,
BW = 80 kHz		 VCC = ±15 V, RL = 600 Ω,
VO = 3 VRMS		 –114 dB
0.0002 %
VCC = ±15 V, RL = 2 kΩ,
VO = 3 VRMS		 –114 dB
0.0002 %
VCC = ±5 V, RL = 600 Ω,
VO = 1 VRMS		 –106 dB
0.0005 %
VCC = ±5 V, RL = 2 kΩ,
VO = 1 VRMS		 –106 dB
0.0005 %
IMD Intermodulation distortion Gain = 10,
SMPTE/DIN two-tone,
4:1 (60 Hz and 7 kHz)		 VCC = ±15 V,
VO = 3 VRMS, RL = 600 Ω		 –109 dB
0.00036 %
VCC = ±15 V,
VO = 3 VRMS, RL = 2 kΩ		 –109 dB
0.00036 %
VCC = ±5 V,
VO = 1 VRMS, RL = 600 Ω		 –105 dB
0.00056 %
VCC = ±5 V,
VO = 1 VRMS, RL = 2 kΩ		 –105 dB
0.00056 %
NOISE/DISTORTION PERFORMANCE
THD Total harmonic distortion VO(pp) = 2 V, f = 1 MHz,
gain = 10, VCC = ±15 V		 –68 dBc
RL = 1 kΩ –77
VO(pp) = 2 V, f = 1 MHz,
gain = 10, VCC = ±5 V		 –69
RL = 1 kΩ –78
Vn Input voltage noise VCC = ±5 V or ±15 V, f > 10 kHz 1.2 nV/√Hz
In Input current noise VCC = ±5 V or ±15 V, f > 10 kHz 2.3 pA/√Hz
Differential gain error Gain = 10, NTSC, 40 IRE modulation, ±100 IRE ramp VCC = ±15 0.02 %
VCC = ±5 V 0.02
Differential phase error Gain = 10, NTSC, 40 IRE modulation, ±100 IRE ramp VCC = ±15 0.08 °
VCC = ±5 V 0.06
XT Channel-to-channel crosstalk (THS4022 only) VCC = ±5 V or ±15 V, f = 1 MHz –54 dBc
DC PERFORMANCE
Open-loop gain VCC = ±15 V, VO = ±10 V,
RL = 1 kΩ		 TA = 25°C 92 100 dB
TA = full range 91
VCC = ±5 V, VO = ±2.5 V,
RL = 1 kΩ		 TA = 25°C 86 98
TA = full range 84
VOS Input offset voltage VCC = ±5 V or ±15 V TA = 25°C 0.3 2 mV
TA = full range 3
Offset voltage drift VCC = ±5 V or ±15 V, TA = full range 2 µV/°C
IIB Input bias current VCC = ±5 V or ±15 V TA = 25°C 9 20 µA
TA = full range 33 µA
IOS Input offset current VCC = ±5 V or ±15 V TA = 25°C 30 250 nA
TA = full range 400 nA
Input offset current drift VCC = ±5 V or ±15 V, TA = full range 0.2 nA/°C
INPUT CHARACTERISTICS
VICR Common-mode input voltage VCC = ±15 V ±13.8 ±14.3 V
VCC = ±5 V ±3.8 ±4.3
CMRR Common-mode rejection ratio VCC = ±15 V, VICR = ±12 V TA = 25 °C 95 dB
TA = full range 74
VCC = ±5 V, VICR = ±2.5 V TA = 25 °C 100
TA = full range 85
ri Input resistance 1 MΩ
Ci Input capacitance 1.5 pF
OUTPUT CHARACTERISTICS
VO Output voltage swing VCC = ±15 V, RL = 250 Ω ±12 ±12.9 V
VCC = ±5 V, RL = 150 Ω ±3 ±3.5
VCC = ±15 V, RL = 1 kΩ ±13 ±13.6
VCC = ±5 V, RL = 1 kΩ ±3.4 ±3.8
IO Output current VCC = ±15 V, RL = 10 Ω 80 200 mA
VCC = ±5 V, RL = 10 Ω 50 160
RO Output resistance(3) Open-loop 5 Ω
POWER SUPPLY
VCC Supply voltage Dual supply ±4.5 ±16.5 V
Single supply 9 33
ICC Supply current (per amplifier) VCC = ±15 V TA = 25°C 7.5 10 mA
TA = full range 11
VCC = ±5 V TA = 25°C 6.5 9
TA = full range 10.5
PSRR Power-supply rejection ratio VCC = ±5 V or ±15 V TA = 25 °C 95 dB
TA = full range 80
(1) Full-power bandwidth = slew rate / [π VO(P-P)].
(2) Slew rate is measured from an output level range of 25% to 75%.
(3) Keep junction temperature less than the absolute maximum rating when the output is heavily loaded or shorted; see also Section 5.1.