SLOS358C September   2011  – April 2020 THS4531

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1. 2.1 1 kHz FFT Plot on Audio Analyzer
  3. 3 Description
  4. 4 Revision History
  5. 5 Packaging and Ordering Information
  6. 6 Electrical Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Thermal Information
    3. 6.3 Electrical Characteristics: VS = 2.7 V
    4. 6.4 Electrical Characteristics: VS = 5 V
  7. 7 Device Information
    1. 7.1 PIN Configurations
      1. Table 2. PIN Functions
  8. 8 Table of Graphs
  9. 9 Typical Characteristics: VS = 2.7 V
  10. 10Typical Characteristics: VS = 5 V
  11. 11Application Information
    1. 11.1 Typical Characteristics Test Circuits
      1. 11.1.1 Frequency Response and Output Impedance
      2. 11.1.2 Distortion
      3. 11.1.3 Slew Rate, Transient Response, Settling Time, Overdrive, Output Voltage, and Turn-On and Turn-Off Time
      4. 11.1.4 Common-Mode and Power Supply Rejection
      5. 11.1.5 VOCM Input
      6. 11.1.6 Balance Error
    2. 11.2 Application Circuits
      1. 11.2.1  Differential Input to Differential Output Amplifier
      2. 11.2.2  Single-Ended Input to Differential Output Amplifier
      3. 11.2.3  Differential Input to Single-Ended Output Amplifier
      4. 11.2.4  Input Common-Mode Voltage Range
      5. 11.2.5  Setting the Output Common-Mode Voltage
      6. 11.2.6  Single-Supply Operation
      7. 11.2.7  Low Power Applications and the Effects of Resistor Values on Bandwidth
      8. 11.2.8  Driving Capacitive Loads
      9. 11.2.9  Audio Performance
      10. 11.2.10 Audio On and Off Pop Performance
    3. 11.3 Audio ADC Driver Performance: THS4531 AND PCM4204 Combined Performance
    4. 11.4 SAR ADC Performance
      1. 11.4.1 THS4531 and ADS8321 Combined Performance
      2. 11.4.2 THS4531 and ADS7945 Combined Performance
    5. 11.5 EVM and Layout Recommendations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

6.3 Electrical Characteristics: VS = 2.7 V

Test conditions at TA = 25°C, VS+ = 2.7 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP, RF = 2 kΩ, RL = 2 kΩ differential, G = 1 V/V, single-ended input, differential output, and input and output referenced to mid-supply, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS TEST
LEVEL(1)
AC PERFORMANCE
Small-signal bandwidth VOUT = 100 mVPP, G = 1 34 MHz C
VOUT = 100 mVPP, G = 2 16
VOUT = 100 mVPP, G = 5 6
VOUT = 100 mVPP, G = 10 2.7
Gain-bandwidth product VOUT = 100 mVPP, G = 10 27 MHz
Large-signal bandwidth VOUT = 2 VPP, G = 1 34 MHz
Bandwidth for 0.1-dB flatness VOUT = 2 VPP, G = 1 12 MHz
Slew rate, rise/fall, 25% to 75% VOUT = 2 V step 190/320 V/µs
Rise/fall time, 10% to 90% 5.2/6.1 ns
Settling time to 1%, rise and fall 25/20 ns
Settling time to 0.1%, rise and fall 60/60
Settling time to 0.01%, rise and fall 150/110 ns
Overshoot/undershoot, rise and fall 1/1 %
2nd-order harmonic distortion f = 1 kHz, VOUT = 1 VRMS –122 dBc
f = 10 kHz –127
f = 1 MHz –59
3rd-order harmonic distortion f = 1 kHz, VOUT = 1 VRMS –130 dBc
f = 10 kHz –135
f = 1 MHz –70
2nd-order intermodulation distortion f = 1 MHz, 200 Hz tone spacing,
VOUT envelope = 1 VPP 		–83 dBc
3rd-order intermodulation distortion –81
Input voltage noise f = 1 kHz 10 nV/√Hz
Voltage noise 1/f corner frequency 45 Hz
Input current noise f = 100 kHz 0.25 pA/√Hz
Current noise 1/f corner frequency 6.5 kHz
Overdrive recovery time Overdrive = 0.5 V 65 ns
Output balance error VOUT = 100 mV, f = 1 MHz –65 dB
Closed-loop output impedance f = 1 MHz (differential) 2.5 Ω
DC PERFORMANCE
Open-loop voltage gain (AOL) 100 113 dB A
Input-referred offset voltage TA = +25°C ±200 ±1000 µV A
TA = 0°C to +70°C ±1405 B
TA = –40°C to +85°C ±1585
TA = –40°C to +125°C ±2000
Input offset voltage drift(2) TA = 0°C to +70°C ±1.7 ±9 µV/°C B
TA = –40°C to +85°C ±1.8 ±9
TA = –40°C to +125°C ±2 ±10
Input bias current TA = +25°C 160 210 nA A
TA = 0°C to +70°C 221 B
TA = –40°C to +85°C 222
TA = –40°C to +125°C 233
Input bias current drift(2) TA = 0°C to +70°C 0.25 nA/°C B
TA = –40°C to +85°C 0.25
TA = –40°C to +125°C 0.25
Input offset current TA = +25°C ±5 ±50 nA A
TA = 0°C to +70°C ±59 B
TA = –40°C to +85°C ±60
TA = –40°C to +125°C ±75
Input offset current drift(2) TA = 0°C to +70°C ±0.05 ±0.2 nA/°C B
TA = –40°C to +85°C ±0.05 ±0.2
TA = –40°C to +125°C ±0.05 ±0.2
INPUT
Common-mode input low TA = +25°C, CMRR > 87 dB VS– – 0.2 VS– V A
TA = –40°C to +125°C, CMRR > 87 dB VS– – 0.2 VS– B
Common-mode input high TA = +25°C, CMRR > 87 dB VS+ – 1.2 VS+ – 1.1 V A
TA = –40°C to +125°C, CMRR > 87 dB VS+ – 1.2 VS+ – 1.1 B
Common-mode rejection ratio 90 116 dB A
Input impedance common-mode 200 || 1.2 kΩ || pF C
Input impedance differential mode 200 || 1 C
OUTPUT
Single-ended output voltage: low TA = +25°C VS– + 0.06 VS– + 0.2 V A
TA = –40°C to +125°C VS– + 0.06 VS– + 0.2 B
Single-ended output voltage: high TA = +25°C VS+ – 0.2 VS+ – 0.11 V A
TA = –40°C to +125°C VS+ – 0.2 VS+ – 0.11 B
Output saturation voltage: high and low 110/60 mV C
Linear output current drive TA = +25°C ±15 ±22 mA A
TA = –40°C to +125°C ±15 B
POWER SUPPLY
Specified operating voltage 2.5 5.5 V B
Quiescent operating current/ch TA = +25°C, PD = VS+ 230 330 µA A
TA = –40°C to +125°C, PD = VS+ 270 370 B
Power-supply rejection (±PSRR) 87 108 dB A
POWER DOWN
Enable voltage threshold Specified on above 2.1 V 2.1 V A
Disable voltage threshold Specified off below 0.7 V 0.7 A
Disable pin bias current PD = VS– + 0.5 V 50 500 nA A
Power-down quiescent current PD = VS– + 0.5 V 0.5 2 µA A
Turn-on time delay Time from PD = high to VOUT = 90% of final value, RL= 200 Ω 650 ns C
Turn-off time delay Time from PD = low to VOUT = 10% of original value, RL= 200 Ω 20
OUTPUT COMMON-MODE VOLTAGE CONTROL (VOCM)
Small-signal bandwidth VOCM input = 100 mVPP 23 MHz C
Slew rate VOCM input = 1 VSTEP 14 V/µs C
Gain 0.99 0.996 1.01 V/V A
Common-mode offset voltage Offset = output common-mode voltage – VOCM input voltage ±1 ±5 mV A
VOCM input bias current VOCM = (VS+ – VS–)/2 ±20 ±100 nA A
VOCM input voltage range 0.8 0.75 to 1.9 1.75 V A
VOCM input impedance 100 || 1.6 kΩ || pF C
Default voltage offset from
(VS+ – VS–)/2		 Offset = output common-mode voltage – (VS+ – VS–)/2 ±3 ±10 mV A
(1) Test levels (all values set by characterization and simulation): (A) 100% tested at +25°C; over temperature limits by characterization and simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
(2) Input offset voltage drift, input bias current drift, and input offset current drift are average values calculated by taking data at the end points, computing the difference, and dividing by the temperature range.