SLUAA81A October   2020  – February 2022 BQ769142 , BQ76922 , BQ76942 , BQ76952

 

  1.   Trademarks
  2. 1Introduction
  3. 2Cell Balancing Circuit Considerations
    1. 2.1 Internal Cell-Balancing Circuit Design
    2. 2.2 External Cell-Balancing Circuit Design Using N-Channel FETs
    3. 2.3 External Cell-Balancing Circuit Design Using P-Channel FETs
    4. 2.4 External Cell-Balancing Circuit Design Using BJTs
    5. 2.5 Voltage Measurement Accuracy During Balance
  4. 3Stand-Alone Balancing Algorithm and Settings
  5. 4Considerations for a Host-Balancing Algorithm
  6. 5Timing Information
  7. 6Debugging Common Issues With Cell Balancing
    1. 6.1 Using a Resistor Divider as a Cell Simulator
  8. 7References
  9. 8Revision History

4 Considerations for a Host-Balancing Algorithm

CAUTION: Improper setting of the cell-balancing control bits may damage the IC.

Host-controlled balancing can be controlled using specific subcommands sent by the host, these subcommands are also accessible in SEALED mode, to avoid the need for the pack to be unsealed in operation in order to initiate balancing. If host-controlled balancing will not be used, access to these subcommands can be disabled by setting the Balancing Configuration[CB_NO_CMD] configuration bit. The subcommands used by the host to control cell balancing are described below.

Table 4-1 Host-Controlled Cell Balancing Subcommands
Subcommand Description
0x0083 CB_ACTIVE_CELLS() When read, reports a bit mask of which cells are being actively balanced. When written, starts balancing on the specified cells. Write 0x0000 to turn balancing off.
0x0084 CB_SET_LVL() When written with a 16-bit cell voltage threshold in mV, the device begins balancing one or more of the highest voltage cells if above the written threshold. When read, returns the threshold.

The device also returns status information regarding how long cells have been balanced through the subcommands described below. When writing to the host-controlled balancing commands, it is necessary to write the checksum and length to registers 0x60/0x61 for the values to be written successfully. Refer to the TRM or BQ769x2 Software Development Guide for information on writing the checksum and length.

Table 4-2 Cell Balancing Status Subcommands
Subcommand Description
0x0085 CBSTATUS1() When read, returns the 16-bit time in seconds that balancing has been active.
0x0086 CBSTATUS2() When read, returns a block containing the 32-bit cumulative balancing times in seconds for each of cells 1 - 8. These values will reset if a device reset occurs, or the device enters CONFIG_UPDATE mode.
0x0087 CBSTATUS3() When read, returns a block containing the 32-bit cumulative balancing times in seconds for each of cells 9 - 16. These values will reset if a device reset occurs, or the device enters CONFIG_UPDATE mode.

When host-controlled balancing is initiated using the subcommands above, the device starts a timer and will continue balancing until the timer reaches a value of Settings:Cell Balancing Config:Cell Balance Interval, or a new balancing subcommand is issued (which resets the timer). This is included as a precaution, in case the host processor initiated balancing but then stopped communication with the BQ769x2 device, so that balancing would not continue indefinitely.

Note on Adjacent Cell Balancing: Care should be taken when using host-controlled balancing to ensure the power dissipation is at safe levels. Adjacent cell balancing is not possible in autonomous mode, but can be done in host-controlled mode. Adjacent cell balancing should only be used is special cases after careful consideration. Care must be taken to not exceed the abs max 100 mA cell balancing current limit or the abs max VC0 input voltage limit.