SLUAAG4 February 2022 TPS62933
Figure 2-1 shows the schematic of a PCM buck converter. A type 2 compensation is used to ensure the stability of the converter.
The loop response model of PCM buck converters is introduced in the application report(2). Figure 2-2 shows the bode plot.
In the loop response of PCM converters, the DC gain is affected by output current.
In TPS62933, the DC gain, fP1_EA, fP2_EA, and fZ_EA are all determined by the device internal compensation circuit, which is expressed as Equation 1 and Equation 2.
where
For the application with all MLCC or small ESR output capacitors, fZ_OUT is at high-frequency range and has limited effects on converter stability.
where
fP_ci is a pole introduced by the inside current loop and related with device slope compensation. Its expression for TPS62933 is shown as Equation 5.