SLUAAO0 june 2023 TPS563207S

2 Lower Output Voltage Than Reference by AVS Control

There are external component and voltage sources at the feedback circuit of buck converter to realize AVS. In normal operating, the output voltage is programed by divider resister Rtop and Rbot. By AVS, the output voltage is also effected by the external resister and voltage source. The control circuit and output voltage calculation are shown in Figure 2-1 and Equation 1, Equation 2, and Equation 3.

Figure 2-1 Adjustable Output Voltage With AVS

Equation 1.

I 2 = I 3 + I 1

Equation 2.

\frac{V F B}{R_{b o t}} = \frac{V t e s t - V F B}{R_{e x t}} + \frac{V o u t - V F B}{R_{t o p}}

Equation 3.

{V o u t = R}_{t o p} \times (\frac{V F B}{R_{b o t}} - \frac{V t e s t - V F B}{R_{e x t}}) + V F B

Based on the previous equations, Equation 4, Equation 5, and Equation 6 show the relationship between Vout and Vtest.

Equation 4.

{V o u t = R}_{t o p} \times \frac{V F B}{R_{b o t}} + V F B (i f V t e s t = V F B)

Equation 5.

{V o u t = R}_{t o p} \times (\frac{V F B}{R_{b o t}} - \frac{V t e s t - V F B}{R_{e x t}}) + V F B {< R}_{t o p} \times \frac{V F B}{R_{b o t}} + V F B (i f V t e s t > V F B)

Equation 6.

{V o u t = R}_{t o p} \times (\frac{V F B}{R_{b o t}} - \frac{V t e s t - V F B}{R_{e x t}}) + V F B {> R}_{t o p} \times \frac{V F B}{R_{b o t}} + V F B (i f V t e s t < V F B)

If a lower output voltage is required, Vtest voltage needs to be larger than reference voltage from Equation 4, Equation 5, and Equation 6. If Vtest is continuously rising until current I3 is over I2, the current I1 change direction through Rtop. The output voltage is lower than reference voltage. Figure 2-2 shows the current direction.

Figure 2-2 Lower Output Voltage With AVS

AVS process changes the FB circuit, and has no impact on power stage and internal loop parameters. The AVS process changes the function of Vfb to Vout. For lower output voltage, normally CFF (feed forward cap) is not suggested to add. The typical FB circuit is shown in Figure 2-3. The function of FB circuit is Equation 7.

Figure 2-3 Typical FB Circuit

Equation 7.

\frac{V F B}{V o u t} = \frac{R_{b o t}}{R_{b o t} + R_{t o p}}

The FB circuit with AVS process is shown in Figure 2-4. Vtest is supposed to be 0 when doing AC analysis. The function of FB circuit with AVS process is shown in Equation 8 based on Equation 2.

Figure 2-4 FB Circuit With AVS

Equation 8.

\frac{V F B}{V o u t} = \frac{R_{t o p} / / R_{b o t} / / R_{e x t}}{R_{t o p}}

Compare the FB transform function, the process of AVS has an impact on DC gain based on [D-CAP2TM Frequency Response Model Based on Frequency Domain Analysis of Fixed On-Time with Bottom Detection Having Ripple Injection]. The gain changing is shown in Equation 9 if using DC gain of typical FB circuit divide DC gain of FB circuit with AVS. If DC gain changes too much, there is an impact on bandwidth and phase margin. For Equation 9 to be equal to 1, AVS resister R_ext is set to be much larger than divider resister based on Equation 10.

Equation 9.

\frac{\frac{V F B}{V o u t} (t y p)}{\frac{V F B}{V o u t} (A V S)} = \frac{\frac{R_{b o t}}{R_{b o t} + R_{t o p}}}{\frac{R_{t o p} / / R_{b o t} / / R_{e x t}}{R_{t o p}}} = \frac{R_{t o p} / / R_{b o t}}{R_{t o p} / / R_{b o t} / / R_{e x t}}

Equation 10.

\frac{\frac{V F B}{V o u t} (t y p)}{\frac{V F B}{V o u t} (A V S)} = \frac{R_{t o p} / / R_{b o t}}{R_{t o p} / / R_{b o t} / / R_{e x t}} \approx \frac{R_{t o p} / / R_{b o t}}{R_{t o p} / / R_{b o t}} = 1