SLUAAO0 june 2023 TPS563207S
4 Test Results with TPS563252
This AVS process is also tested on TPS563252EVM board. Please refer to the detailed EVM information in PS563252 and TPS563257 Step-Down Converter Evaluation Module User's Guide. Update the BOM to match the Simplis schematic.
Figure 4-1 to Figure 4-3 show the steady state status. From steady state waveform, output voltage and switching waveform are stable. Figure Figure 4-4 shows the dynamic change about output voltage with external test voltage. Channel 1 is Vtest voltage with dynamic change from 1.07 V to 5.77 V. Output voltage change by following Vtest voltage. From the waveform, output voltage smoothly change with external output voltage. Figure 4-5 to Figure 4-7 show the bode plot at difficult output voltage. Phase margin and gain margin show the stable. Figure 4-8 combine the three bode plot together to check if there is difference. From the waveform, the external test voltage have no effect on bode plot.
Figure 4-1 Steady State at 0.7 V
Output Voltage and 1 V External Test Voltage
Figure 4-3 Steady State at 0.5 V
Output Voltage and 6 V External Test Voltage
Figure 4-5 Bode Plot at 0.5 V Output
Voltage 
Figure 4-7 Bode Plot at 0.7 V Output
Voltage 
Figure 4-2 Steady State at 0.6 V
Output Voltage and 3 V External Test Voltage
Figure 4-4 Dynamic Change for Output
Voltage with External Test Voltage
Figure 4-6 Bode Plot at 0.6 V Output
Voltage 
Figure 4-8 Bode Plot