SLUSDD4B April 2019 – December 2020
PRODUCTION DATA
The output capacitance value is picked such that there is enough capacitance for the required voltage ripple and output current load step. The UC1843B-SP design uses equations Equation 22 and Equation 24 to find a minimum capacitance.
A value of around 1145 µF was chosen to keep output voltage ripple low. Note that the output voltage ripple in the design was further decreased by adding an output filter and by adding an inductor after a small portion of the output capacitance. Six ceramic capacitors were picked to be placed before the output filter and then the large tantalum capacitors with some small ceramics were added to be part of the output filter. The initial ceramics will help with the initial current ripple, but have a very large output voltage ripple. This voltage ripple will be attenuated by the inductor and capacitor combination placed between the ceramic capacitors and the output. The equations below allow for finding the amount of attenuation that will come from a specific output filter inductance. An inductance of 500 nH was chosen to attenuate the output voltage ripple and the attenuation was sufficient for the design.
Sometimes the output filter can cause peaking at high frequencies, this can be damped by adding a resistor in parallel with the inductor. For the UC1843B-SP design, 0.5 Ω was used as a very conservative value. The resistance needed to damp the peaking can be calculated using the following equations: