QIM (Bit 7): QMax imbalance |
| 1 = | Enabled |
| 0 = | Disabled (default) |
| | |
OTF (Bit 6): Overtemperature FET |
| 1 = | Enabled |
| 0 = | Disabled (default) |
| | |
COVL (Bit 5): Cell overvoltage latch |
| 1 = | Enabled |
| 0 = | Disabled |
| | |
SOT (Bit 4): Safety overtemperature |
| 1 = | Enabled |
| 0 = | Disabled (default) |
| | |
SOCD (Bit 3): Safety overcurrent in discharge |
| 1= | Enabled |
| 0 = | Disabled (default) |
| | |
SOCC (Bit 2): Safety overcurrent in charge |
| 1= | Enabled |
| 0 = | Disabled (default) |
| | |
SOV (Bit 1): Safety cell overvoltage |
| 1 = | Enabled |
| 0 = | Disabled (default) |
| | |
SUV (Bit 0): Safety cell undervoltage |
| 1 = | Enabled |
| 0 = | Disabled (default) |