SLUUBY1B December 2020 – April 2022 BQ76942
The BQ76942 device includes predischarge functionality, which can be used to reduce inrush current when the load is initially powered, by first enabling a high-side PDSG PFET (driven from the PDSG pin) with series resistor, which allows the load to slowly charge. If predischarge mode is enabled, whenever the DSG FET is turned on to power the load, the device will first enable the PDSG FET, then transition to turn on the DSG FET and turn off the PDSG FET. The predischarge mode is enabled when Settings:FET:FET Options[PDSG_EN] is set.
When predischarge mode has been activated, the device will remain in this mode until either a timeout is reached, or the voltage at the LD pin rises to within a programmable delta of the top-of-stack voltage, or both. The timeout can be set from 10 ms to 2550 ms in steps of 10 ms using Settings:FET:Predischarge Timeout. If the timeout is set to 0, then the device will not use a timeout and will exit when the voltage condition is met. The voltage delta is programmable from 10 mV to 2550 mV in steps of 10 mV using Settings:FET:Predischarge Stop Delta. If the voltage delta is set to 0, the device will not use a voltage condition and will exit based on the timeout. Note: the voltage delta is only checked by the device every 250 ms. The status of the PDSG FET is provided in the 0x7F FET Status()[PDSG_FET] register bit.
If the Settings:FET:FET Options[PDSG_EN] bit is set and the DFETOFF or BOTHOFF signal is asserted, the DSG and PDSG FETs will be disabled, but the device will be initially blocked from entering SLEEP mode (if already in SLEEP mode, the device will return to NORMAL mode when the signal is asserted). SLEEP mode can again be allowed if the host sends the DSG_PDSG_OFF() or ALL_FETS_OFF() subcommand, or a protection fault occurs (such as a Host Watchdog Fault or an OTF fault).