SLUUC73A March   2020  – December 2023 BQ25616

 

  1.   1
  2.   BQ25616, BQ25616J BMS026 Evaluation Module
  3.   Trademarks
  4. 1Introduction
    1. 1.1 EVM Features
    2. 1.2 I/O Descriptions
  5. 2Test Summary
    1. 2.1 Equipment
    2. 2.2 Equipment Setup
    3. 2.3 Test Procedure
      1. 2.3.1 Initial Settings
      2. 2.3.2 Charge Mode Verification
      3. 2.3.3 Boost Mode Verification
      4. 2.3.4 Helpful Tips
  6. 3PCB Layout Guideline
  7. 4Board Layout
  8. 5Schematic
  9. 6Bill of Materials
  10. 7Revision History

I/O Descriptions

Table 1-2 lists the input and output connections available on this EVM and their respective descriptions.

Table 1-2 EVM I/O Connections
JackDescription
J1(2) – VACPositive rail of the charger input voltage.
J1(1) – GNDGround.
J2(1) – SYSTEMPositive rail of the charger system output voltage, typically connected to the system load.
J2(2) – GNDGround.
J3(1) – PMIDPositive rail of the charger output voltage for power bank applications in reverse boost mode (OTG). This output also shares the rail with the VIN input rail in forward buck mode.
J3(2) – GNDGround.
J4Input source Micro B USB port.
J5-BATSNS_ICHGBATSNS or ICHG pin connection.
J5(3) – ICHGICHG pin external connection.
J5(2) – BATTERYPositive rail of the charger battery input, connected to the positive terminal of the external battery.
J5(1) – GNDGround.
J6USB2ANY 10-pin connector.
J7I2C 4-pin connector for the EV2300/2400 interface board.

Table 1-3 lists the jumepr, shunt and switch installations available on this EVM and their respective descriptions.

Table 1-3 EVM Jumper, Shunt and Switch Installation
Jack Description BQ25616 Setting BQ25616J Setting
JP1 VBUS additional capacitance connection. Not Installed Not Installed
JP2 SYS additional capacitance connection. Not Installed Not Installed
JP3 PMID additional capacitance connection. Not Installed Not Installed
JP4 BAT additional capacitance connection. Not Installed Not Installed
JP5 I/O Pullup rail selection. Selection has either BAT or SYS as the pullup rail for /CE, STAT, OTG, and /PG pins. Short PULLUP to SYS Short PULLUP to SYS
JP6 Micro B USB input D+ connection to charger D+ pin. Installed Installed
JP7 ICHG to BAT or BATTERY connection. Not Installed Not Installed
JP8 ICHG resistor setting connection. Must be connected for charging to operate correctly. Installed Installed
JP9 Micro B USB input D+ connection to charger D+ pin. Installed Installed
JP10 PSEL pin input current selection. Connect this to HIGH on PSEL enabled chargers to select 500 mA default input current limit. Connect this to LOW on PSEL enabled chargers to select 2.4-A default input current limit. Not Installed Not Installed
JP11 REGN connection to TS network. Must be connected for thermistor sensing to operate correctly. Installed Installed
JP12 ILIM resistor setting connection. Must be connected for ‘Unknown Adapter’ input current limiting to operate correctly. Installed Installed
JP13 STAT pin LED indicator connection. This indicates the current charger Status. Installed Installed
JP14 /PG pin LED indicator connection. On /PG enabled chargers, this indicates the Power Good status Installed Installed
JP15 ICHG, ILIM, AGND header connection point. Not Installed Not Installed
JP16 Thermistor NORMAL temperature setting. Connect jumper to simulate charger entering TNORMAL (T2-T3) temperature region. Installed Installed
JP17 /CE pin connection to ground to enable charging. When removed, /CE pin pulls up to disable charge. Installed Installed
JP18 Thermistor HOT temperature setting. Connect jumper to simulate charger entering THOT (>T5) temperature region. Not Installed Not Installed
JP19 D- to /PG rail connection Not Installed Not Installed
JP20 OTG pin connection to ground to disable OTG boost mode. When removed, OTG boost mode is enabled only in battery-only operation. Installed Installed
JP21 VSET pin setting connection. Leave floating to set VBATREG to 4.208V. Connect to 10-kOhm to ground to set VBATREG to 4.100V. Connect to ground directly to set VBATREG to 4.352V Not Installed Not Installed
S1 /QON pin pull-down. No function. Not Populated Not Populated
S2 STAT and /PG LED bypass switches. 1-4: Open, 2-3: Open 1-4: Open, 2-3: Open

Table 1-4 lists the recommended operating conditions for this EVM.

Table 1-4 Recommended Operating Conditions
SymbolDescriptionMINTYPMAXUnit
VVBUS, VVACInput voltage applied to VAC and VBUS pins4.013.5V
VBATBattery voltage applied to BAT pin4.35V
IVBUSInput current into VBUS3.2A
ISWOutput current (SW)3.2A
IBATFast charging current3.0A
RMS Discharging current through internal BATFET6.0A