SLUUCF7 April   2021 BQ25960

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 EVM Features
    2. 1.2 I/O Descriptions
  3. 2Test Summary
    1. 2.1 Equipment
    2. 2.2 Equipment Setup
    3. 2.3 Software Setup
    4. 2.4 Test Procedure
      1. 2.4.1 Initial Settings
      2. 2.4.2 Communication Verification
      3. 2.4.3 Switched Cap Mode Charge Verification
      4. 2.4.4 Bypass Mode Charge Verification
      5. 2.4.5 Dual BQ25960 Operation
      6. 2.4.6 BQ25611D Charge Verification
  4. 3PCB Layout Guidelines
  5. 4Board Layout, Schematic, and Bill of Materials
    1. 4.1 Board Layout
    2. 4.2 Schematic
    3. 4.3 Bill of Materials

2.4.5 Dual BQ25960 Operation

The BQ25960 EVM also supports dual BQ25960 operation, with U1 operating as the primary charger, and U2 operating as the secondary charger. This allows each BQ25960 to operate at a lower charging current with higher efficiency compared with a single BQ25960 operating at the same total charging current. As a reminder, if the jumper settings in Table 1-3 have been followed, then the I2C address for U1 is 0x65, and the I2C address for U2 is 0x67. Note that the jumper settings for JP3 and JP9 are different for single BQ25960 and dual BQ25960 operation.

  1. For U1, follow the previous steps in order to enable charge in either switched cap mode or bypass mode. U1 should now begin charging.
  2. Select I2C address 0x67 in order to communicate with U2.
  3. Follow the same steps to enable charge for U2. The two BQ25960 devices should now be charging in parallel.