SLUUCF7 April   2021 BQ25960

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 EVM Features
    2. 1.2 I/O Descriptions
  3. 2Test Summary
    1. 2.1 Equipment
    2. 2.2 Equipment Setup
    3. 2.3 Software Setup
    4. 2.4 Test Procedure
      1. 2.4.1 Initial Settings
      2. 2.4.2 Communication Verification
      3. 2.4.3 Switched Cap Mode Charge Verification
      4. 2.4.4 Bypass Mode Charge Verification
      5. 2.4.5 Dual BQ25960 Operation
      6. 2.4.6 BQ25611D Charge Verification
  4. 3PCB Layout Guidelines
  5. 4Board Layout, Schematic, and Bill of Materials
    1. 4.1 Board Layout
    2. 4.2 Schematic
    3. 4.3 Bill of Materials

3 PCB Layout Guidelines

The PCB layout is very important to maximize the electrical and thermal performance of the total system. General guidelines are provided, but the form factor, board stack-up, and proximity of other components also need to be considered to maximize the performance.

  1. VBUS and VOUT copper pours should be as short and wide as possible to accommodate high current.
  2. VBUS and VOUT copper pours should run at least 150 mil (3.81 mm) straight (perpendicular to the WCSP ball array) before making turns.
  3. CFLY caps should be placed as close as possible to the device, and the CFLY copper pours should be as wide as possible until close to the IC.
  4. CFLY pours should be as symmetrical as possible between CFH pads and CFL pads.
  5. Place low ESR bypass capacitors to ground for VBUS, PMID, and VOUT. These capacitors should be placed as close to the device pins as possible.
  6. The CFLY pads should be as small as possible, and the CFLY caps placed as close as possible to the device, as these are switching pins and this will help reduce EMI.
  7. Do not route so the power planes are interrupted by signal traces.