SLUUCJ6 November 2023
The EVM includes a resistive cell simulator made up of 200-Ω series resistors. The taps of the resistor network are connected to the cell inputs using shunts on the J10 header. BAT- is always connected to the resistor divider network. Installing a shunt on the top cell location connects the top cell input to the resistor divider to provide simulated voltages for the other cell inputs. If the shunt is not installed on the top cell position of the header all lower inputs are pulled to VSS. Installing shunts for the lower cell positions will connect the input to the simulated voltage. There is no indication of the cell simulator connection, the user must be aware of the shunt installation.