SLUUCL8A December   2021  – February 2022 TPSM8D6C24

 

  1.   Trademarks
  2. 1 Description
    1. 1.1 Before You Begin
    2. 1.2 Features
  3. 2 Electrical Performance Specifications
  4. 3 Schematic
  5. 4 Test Setup
    1. 4.1 Test and Configuration Software
      1. 4.1.1 Description
      2. 4.1.2 Features
    2. 4.2 Test Equipment
      1. 4.2.1 Voltage Source
      2. 4.2.2 Oscilloscope
      3. 4.2.3 Multimeters
      4. 4.2.4 Output Load
      5. 4.2.5 Fan
      6. 4.2.6 USB-to-GPIO Interface Adapter
      7. 4.2.7 Recommended Wire Gauge
    3. 4.3 List of Test Points, Jumpers, and Connectors
    4. 4.4 Evaluating Split Rail Input
  6. 5 EVM Configuration Using the Fusion GUI
    1. 5.1 Configuration Procedure
  7. 6 Test Procedure
    1. 6.1 Line and Load Regulation and Efficiency Measurement Procedure
    2. 6.2 Efficiency Measurement Test Points
    3. 6.3 Control Loop Gain and Phase Measurement Procedure
  8. 7 Performance Data and Typical Characteristic Curves
    1. 7.1 Efficiency
    2. 7.2 Load Regulation
    3. 7.3 Line Regulation
    4. 7.4 Transient Response
    5. 7.5 Control Loop Bode Plot
    6. 7.6 Output Ripple
    7. 7.7 Control On
    8. 7.8 Control Off
    9. 7.9 Thermal Image
  9. 8 EVM Assembly Drawing and PCB Layout
  10. 9 Bill of Materials
  11. 10Using the Fusion GUI
    1. 10.1  Opening the Fusion GUI
    2. 10.2  General Settings
    3. 10.3  Changing ON_OFF_CONFIG
    4. 10.4  Pop-Up for Some Commands While Conversion is Enabled
    5. 10.5  SMBALERT# Mask
    6. 10.6  Device Info
    7. 10.7  Phase Commands
    8. 10.8  All Config
    9. 10.9  Pin Strapping
    10. 10.10 Monitor
    11. 10.11 Status
  12. 11Revision History

8 EVM Assembly Drawing and PCB Layout

through show the design of the TPSM8D6C24EVM-2PH printed circuit board.

Figure 8-1 TPSM8D6C24EVM-2PH Top Side Component View (Top View)
Figure 8-3 TPSM8D6C24EVM-2PH Top Copper (Top View)
Figure 8-5 TPSM8D6C24EVM-2PH Internal Layer 2 (Top View)
Figure 8-7 TPSM8D6C24EVM-2PH Internal Layer 4 (Top View)
Figure 8-9 TPSM8D6C24EVM-2PH Internal Layer 6 (Top View)
Figure 8-2 TPSM8D6C24EVM-2PH Bottom Side Component View (Bottom View)
Figure 8-4 TPSM8D6C24EVM-2PH Internal Layer 1 (Top View)
Figure 8-6 TPSM8D6C24EVM-2PH Internal Layer 3 (Top View)
Figure 8-8 TPSM8D6C24EVM-2PH Internal Layer 5 (Top View)
Figure 8-10 TPSM8D6C24EVM-2PH Internal Bottom Layer (Top View)