Alleviating Short Circuit Thermal Concerns for PoE Powered Devices

Alleviating Short Circuit Thermal Concerns for PoE Powered Devices

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1 Introduction

In the traditional Flyback topology shown in Figure 1, the peak current signal is sensed through the current shunt resistor at the primary side of the power transformer. When the overcurrent occurs at output side, the Flyback controller IC will clamp the input current to the point of overcurrent protection (OCP) threshold by monitoring the peak current signal on current shunt resistor in Figure 2. The method of OCP protection is an input current limit, or input power (Pin) limit. That method also does output power (Pout) limit indirectly. During the OCP, based on Pout limit, the output voltage drops while the output peak fault current is increasing until the voltage on auxiliary (AUX) winding drops to hit the point of under voltage lockout (UVLO) of controller’s Vc pin. The worst case occurs at lower Vout and higher Pin limit at short circuit condition, producing the pretty high peak fault current and causing the thermal issue on Synchronous FET or Rectifying Diode at secondary side.

The duration of peak fault current depends on the capacitance on Vc pin of controller. The smaller capacitance on Vc pin, the higher hiccup OCP frequency is produced. The higher capacitance on Vc pin, the longer duration of peak fault current exists. Whatever the higher hiccup OCP frequency or the longer duration of peak fault current, the duty cycle of hiccup OCP is similar and the thermal issue could not be reduced. One way to minimize the thermal issue at short circuit condition is to reduce the hiccup OCP frequency and to make the shorter duration of peak fault current.

Figure 1. Traditional Flyback Current Limit Scheme

Figure 2. Peak current signal on current shunt resistor