SLVAFP9 October   2024 TPS65219 , TPS6521905

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2TPS65219 Overview
  6. 3Power Delivery Networks
    1. 3.1 Always ON: Designed for Cost (-1 and -2 Devices)
    2. 3.2 Always On: Designed for Power and or Efficiency (-1L and -2L Devices)
    3. 3.3 Always On: Designed for PL Performance (-3 Devices)
    4. 3.4 Full Power Management Flexibility (All Speed Grade)
  7. 4Loading a NVM Configuration File to PMIC
  8. 5Summary
  9. 6References

3.2 Always On: Designed for Power and or Efficiency (-1L and -2L Devices)

The always ON-power/efficiency designed power supply consolidation uses the -1L/-2L speed grade devices. This power scheme is similar to the cost optimized optimization. The -1L and -2L devices allow to run VCCINT at 0.72V which helps to reduce power consumption and improve efficiency.

Designed for Power and or Efficiency (-1L and -2L Devices) PDNFigure 3-4 Designed for Power and or Efficiency (-1L and -2L Devices) PDN
Note: Designed for Power and or Efficiency (-1L and -2L Devices): TPS6521905 PMIC NVM configuration file link.
Designed for Power and or Efficiency (-1L and -2L Devices) Power-Up SequenceFigure 3-5 Designed for Power and or Efficiency (-1L and -2L Devices) Power-Up Sequence
Designed for Power and or Efficiency (-1L and -2L Devices) Power-Down SequenceFigure 3-6 Designed for Power and or Efficiency (-1L and -2L Devices) Power-Down Sequence