2 Power Loss and Performance Expectations

First, the power loss equations that can be used to simulate thermal performance are detailed. There are several parameters which contribute to the thermal dissipation of an integrated FET driver. The most influential factor is the internal R_ds(on) of the device, which represents the drain to source resistance of an internal FET. When driving high current, the average power loss due to this resistance (referred to as conduction loss) is the primary contributor to the total power loss. Each of the types of loss is explained below for both trapezoidal and FOC control.

Conduction Loss

R_ds(on) is also temperature-variant. For example, R_ds(on) increases as the temperature of the driver increases, and contributes to more power loss until a point of saturation. This is why the thermal data shown in the next section was taken several minutes after the driver reached the desired output current. In addition to conduction loss, switching loss and body diode loss can contribute to the total power loss of the device. Switching loss refers to the loss due to slewing as the FET turns on or off, while body diode loss refers to the loss due to current flowing through the FET's body diode during dead time. These are calculated using the following equations:

Switching Loss

Body Diode Loss

These power losses depend on other parameters such as slew rate and PWM frequency, which is discussed later in the lab data. More information on each of these equations can be found in the Thermal considerations for integrated MOSFET drivers video, which explains all of the power loss sources in systems using integrated FET drivers.

Before looking at the data, some predictions can be made about the performance of the DRV8316 and DRV8317. Since the DRV8316 has a lower R_ds(on) value, the expectation is that DRV8316 to have an overall cooler temperature at the same output level when compared with the DRV8317. Additionally, based on the previous equations, see the following:

• Higher slew rate means that t_rise or t_fall decreases, which means the device can experience less power loss and run cooler than at a lower slew rate.
• Higher PWM frequency increases switching and diode losses since the FETs switch more often per second (and thus must go through the power loss-intensive Miller zone more often), causing the device to run hotter than at a lower PWM frequency.
• The FOC commutation algorithm is the most efficient method of commutating a BLDC motor, so the FOC needs to produce better thermal performance than trapezoidal control, which is the least efficient algorithm.

However, there are potential drawbacks to each of these settings, which is explained more in a later section.

Lastly, each device is rated to operate in a range of junction temperatures. Due to the nature of PCB design, the junction temperature is difficult to measure. The lab data presented in this application note refers to the package temperature. These two values can differ due to a variety of factors, such as the thermal resistances, ambient temperature, and available area for the heat to conduct into different media and eventually into the ambient environment. Detailed testing and analysis is required to correlate the two values, but for more information, please refer to the following application note: Semiconductor and IC Package Thermal Metrics. This resource is also listed in some data sheets next to the Thermal Information section.

Based on these predictions and the theory discussed previously, users need to consider real-world lab data produced using the DRV8316 and DRV8317 EVMs.