SLVS416 Data sheet

SLVS416C February 2002 – January 2015

PRODUCTION DATA.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

			MIN	MAX	UNIT
V_I	Input voltage	VIN, SS/ENA, SYNC	−0.3	7	V
		RT	−0.3	6	V
		VSENSE	−0.3	4	V
		BOOT	−0.3	17	V
V_O	Output voltage	VBIAS, PWRGD, COMP	−0.3	7	V
V_O	Output voltage	PH	−0.6	10	V
I_O	Source current	PH	Internally Limited		V
I_O	Source current	COMP, VBIAS		6	mA
I_S	Sink current	PH		6	A
		COMP		6	mA
		SS/ENA, PWRGD		10	mA
	Voltage differential	AGND to PGND		±0.3	V
T_J	Operating virtual junction temperature		–40	125	°C
T_stg	Storage temperature		−65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_I	Input voltage range	3	6	V
T_J	Operating junction temperature	–40	125	°C

6.3 Thermal Information⁽²⁾

THERMAL METRIC⁽¹⁾		TPS5431x	UNIT
THERMAL METRIC⁽¹⁾		PWP (28 PINS)	UNIT
R_θJA	Junction-to-ambient thermal resistance	26.0	°C/W
R_θJA	Junction-to-ambient thermal resistance (without solder on PowerPad)	57.5	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) Test board conditions:

3 inches × 3 inches, 2 layers, Thickness 0.062 inch
1.5 oz copper traces located on the top of the PCB
1.5 oz copper plane on the bottom of the PCB
Ten thermal vias (see recommended land pattern)

6.4 Dissipation Ratings⁽¹⁾⁽²⁾

PACKAGE	T_A = 25 °C POWER RATING	T_A= 70 °C POWER RATING	T_A = 85 °C POWER RATING	UNIT
20-Pin PWP with solder	3.85⁽³⁾	2.12	1.54	W
20-pin PWP without solder	1.73	0.96	0.69	W

(1) For more information on the PWP package, refer to TI technical brief, SLMA002

(2) Test board conditions:

3 inches × 3 inches, 2 layers, Thickness 0.062 inch
1.5 oz copper traces located on the top of the PCB
1.5 oz copper plane on the bottom of the PCB
Ten thermal vias (see recommended land pattern)

(3) Maximum power dissipation may be limited by overcurrent protection

6.5 Electrical Characteristics

T_J = –40°C to 125°C, VIN = 3 V to 6 V (unless otherwise noted)

PARAMETER			TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE, VIN
VIN	Input voltage range			3		6	V
I_(Q)	Quiescent current		f_s = 350 kHz, FSEL ≤ 0.8 V, RT open		6.2	9.6	mA
			f_s = 550 kHz, FSEL ≤ 2.5 V, RT open, Phase pin open		8.4	12.8
			Shutdown, SS/ENA = 0 V		1	1.4
UNDERVOLTAGE LOCK OUT
UVLO	Start threshold voltage				2.95	3.0	V
	Stop threshold voltage			2.70	2.80		V
	Hysteresis voltage			0.14	0.16		V
	Rising and falling edge deglitch ⁽¹⁾				2.5		µs
BIAS VOLTAGE
VBIAS	Output voltage		I_(VBIAS) = 0	2.70	2.80	2.90	V
VBIAS	Output current⁽²⁾					100	µA
OUTPUT VOLTAGE
V_O	Output voltage	TPS54311	T_J = 25°C, VIN = 5 V		0.9		V
		TPS54311	3 V ≤ VIN ≤ 6 V, 0 ≤ I_L ≤ 3 A, −40°C ≤ T_J ≤ 125°C	–2.5%		2.5%	V
		TPS54312	T_J = 25°C, VIN = 5 V		1.2		V
		TPS54312	3 V ≤ VIN ≤ 6 V, 0 ≤ I_L ≤ 3 A, −40°C ≤ T_J ≤ 125°C	–2.5%		2.5%	V
		TPS54313	T_J = 25°C, VIN = 5 V		1.5		V
		TPS54313	3 V ≤ VIN ≤ 6 V, 0 ≤ I_L ≤ 3 A, −40°C ≤ T_J ≤ 125°C	–2.5%		2.5%	V
		TPS54314	T_J = 25°C, VIN = 5 V		1.8		V
		TPS54314	3 V ≤ VIN ≤ 6 V, 0 ≤ I_L ≤ 3 A, −40°C ≤ T_J ≤ 125°C	–2.5%		2.5%	V
		TPS54315	T_J = 25°C, VIN = 5 V		2.5		V
		TPS54315	3 V ≤ VIN ≤ 6 V, 0 ≤ I_L ≤ 3 A, −40° ≤ T_J ≤ 125°C	–2.5%		2.5%	V
		TPS54316	T_J = 25°C, VIN = 5 V		3.3		V
		TPS54316	4 V ≤ VIN ≤ 6 V, 0 ≤ I_L ≤ 3 A, −40° ≤ T_J ≤ 125°C	−2.5%		2.5%	V
REGULATION
	Line regulation⁽¹⁾⁽³⁾		I_L = 3 A, 350 ≤ fs ≤ 550 kHz, T_J = 85°C		0.21		%/V
	Load regulation⁽¹⁾⁽³⁾		I_L = 0 A to 3 A, 350 ≤ f_s ≤ 550 kHz, T_J= 85°C		0.21		%/A
OSCILLATOR
	Internally set-free running frequency		FSEL ≤ 0.8 V, RT open	280	350	420	kHz
	Internally set-free running frequency		FSEL ≥ 2.5 V, RT open	440	550	660	kHz
	Externally set-free running frequency range		RT = 180 kΩ (1% resistor to AGND)⁽¹⁾	252	280	308	kHz
			RT = 100 kΩ (1% resistor to AGND)	460	500	540
			RT = 68 kΩ (1% resistor to AGND)⁽¹⁾	663	700	762
	High level threshold voltage at FSEL			2.5			V
	Low level threshold voltage at FSEL					0.8	V
	Ramp valley⁽¹⁾				0.75		V
	Ramp amplitude (peak-to-peak)⁽¹⁾				1		V
	Minimum controllable on time⁽¹⁾					200	ns
	Maximum duty cycle⁽¹⁾			90%
ERROR AMPLIFIER
	Error amplifier open loop voltage gain⁽⁴⁾				26		dB
	Error amplifier unity gain bandwidth⁽⁴⁾			3	5		MHz
PWM COMPARATOR
	PWM comparator propagation delay time, PWM comparator input to PH pin (excluding dead time)		10-mV overdrive⁽⁴⁾		70	85	ns
SLOW-START/ENABLE
	Enable threshold voltage, SS/ENA			0.82	1.20	1.40	V
	Enable hysteresis voltage, SS/ENA⁽⁴⁾				0.03		V
	Falling edge deglitch, SS/ENA⁽⁴⁾				2.5		µs
	Internal slow-start time⁽⁴⁾	TPS54311		2.6	3.3	4.1	ms
		TPS54312		3.5	4.5	5.4
		TPS54313		4.4	5.6	6.7
		TPS54314		2.6	3.3	4.1
		TPS54315		3.6	4.7	5.6
		TPS54316		4.7	6.1	7.6
	Charge current, SS/ENA		SS/ENA = 0V	3	5	8	µA
	Discharge current, SS/ENA		SS/ENA = 0.2 V, V_I = 1.5 V	1.5	2.3	4	mA
POWERGOOD
	Powergood threshold voltage		VSENSE falling		90		%V_ref
	Powergood hysteresis voltage⁽⁴⁾				3		%V_ref
	Powergood falling edge deglitch⁽⁴⁾				35		µs
	Output saturation voltage, PWRGD		I_(sink) = 2.5 mA		0.18	0.30	V
	Leakage current, PWRGD		V_I = 5.5 V			1	µA
CURRENT LIMIT
	Current limit		V_I = 3 V, output shorted⁽⁴⁾	42	6.5		A
	Current limit		V_I = 6 V, output shorted⁽⁴⁾	4.5	7.5		A
	Current limit leading edge blanking time⁽⁴⁾				100		ns
	Current limit total response time⁽⁴⁾				200		ns
THERMAL SHUTDOWN
	Thermal shutdown trip point⁽⁴⁾			135	150	165	°C
	Thermal shutdown hysteresis⁽⁴⁾				10		°C
OUTPUT POWER MOSFETS
r_DS(on)	Power MOSFET switches		V_I = 6 V⁽⁵⁾		59	88	mΩ
r_DS(on)	Power MOSFET switches		I_O = 3 A, V_I = 3 V⁽⁵⁾		856	136	mΩ