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  • TPS6112x Synchronous Boost Converter With 1.1-A Switch and Integrated LDO

    • SLVS427D JUNE   2002  – May 2015 TPS61120 , TPS61121 , TPS61122

      PRODUCTION DATA.  

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  • TPS6112x Synchronous Boost Converter With 1.1-A Switch and Integrated LDO
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Controller Circuit
      2. 9.3.2 Synchronous Rectifier
      3. 9.3.3 LDO
      4. 9.3.4 Device Enable
        1. 9.3.4.1 Undervoltage Lockout
        2. 9.3.4.2 Softstart
      5. 9.3.5 LDO Enable
      6. 9.3.6 Power Good
      7. 9.3.7 Low Battery Detector Circuit—LBI/LBO
      8. 9.3.8 Low-EMI Switch
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power Save Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Solution for Maximum Output Power
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Programming the Output Voltage
            1. 10.2.1.2.1.1 DC-DC Converter
            2. 10.2.1.2.1.2 LDO
          2. 10.2.1.2.2 Programming the LBI/LBO Threshold Voltage
          3. 10.2.1.2.3 Inductor Selection
          4. 10.2.1.2.4 Capacitor Selection
            1. 10.2.1.2.4.1 Input Capacitor
            2. 10.2.1.2.4.2 Output Capacitor DC-DC Converter
              1. 10.2.1.2.4.2.1 Small Signal Stability
            3. 10.2.1.2.4.3 Output Capacitor LDO
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Low Profile Solution, Maximum Height 1.8 mm
      3. 10.2.3 Dual Power Supply With Auxiliary Positive Output Voltage
      4. 10.2.4 Dual Power Supply With Auxiliary Negative Output Voltage
      5. 10.2.5 Single Output Using LDO as Filter
      6. 10.2.6 Dual Input Power Supply Solution
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
  15. IMPORTANT NOTICE
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DATA SHEET

TPS6112x Synchronous Boost Converter With 1.1-A Switch and Integrated LDO

1 Features

  • Synchronous, 95% Efficient, Boost Converter With 500-mA Output Current From 1.8-V Input
  • Integrated 200-mA Reverse Voltage Protected LDO for DC-DC Output Voltage Post Regulation or Second Output Voltage
  • 40-µA (Typical) Total Device Quiescent Current
  • Input Voltage Range: 1.8 V to 5.5 V
  • Fixed and Adjustable Output Voltage Options up to 5.5 V
  • Power Save Mode for Improved Efficiency at Low Output Power
  • Low Battery Comparator
  • Power Good Output
  • Low EMI-Converter (Integrated Antiringing Switch)
  • Load Disconnect During Shutdown
  • Overtemperature Protection
  • Available in a Small 4-mm × 4-mm VQFN-16 or in a TSSOP-16 Package

2 Applications

  • All Single Cell Li or Dual Cell Battery or USB Powered Products as MP-3 Player, PDAs, and Other Portable Equipment
  • Dual Input or Dual Output Mode
  • Simple Li-Ion to 3.3-V Conversion

Typical Application Schematic

TPS61120 TPS61121 TPS61122 FSD_LVS427.gif

3 Description

The TPS6112x devices provide a complete power supply solution for products powered by either a one-cell Li-Ion or Li-Polymer by either a one-cell Li-Ion or Li-Polymer battery, or a two- to four-cell Alkaline, NiCd, or NiMH battery. The devices can generate two stable output voltages that are either adjusted by an external resistor divider or are fixed internally on the chip. The device also provides a simple solution for generating 3.3 V out of a one-cell Li-Ion or Li-Polymer battery at a maximum output current of at least 200 mA with supply voltages down to 1.8 V. The implemented boost converter is based on a fixed frequency, pulse-width-modulation (PWM) controller using a synchronous rectifier to obtain maximum efficiency. The maximum peak current in the boost switch is limited to a value of 1600 mA.

The converter can be disabled to minimize battery drain. During shutdown, the load is completely disconnected from the battery. A low-EMI mode is implemented to reduce ringing and, in effect, lower radiated electromagnetic energy when the converter enters discontinuous conduction mode. A power good output at the boost stage simplifies control of any connected circuits like cascaded power supply stages or microprocessors.

The built-in LDO can be used for a second output voltage derived either from the boost output or directly from the battery. The LDO can be enabled separately that is, using the power good of the boost stage. The device is packaged in a 16-pin VQFN (RSA) package measuring 4 mm x 4 mm or in a 16-pin TSSOP (PW) package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS61120 TSSOP (16) 5.00 mm × 4.40 mm
VQFN (16) 4.00 mm × 4.00 mm
TPS61121 TSSOP (16) 5.00 mm × 4.40 mm
TPS61122
  1. For all available packages, see the orderable addendum at the end of the datasheet.

4 Revision History

Changes from C Revision (April 2004) to D Revision

  • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go

5 Device Options

Table 1. Available Output Voltage Options(1)

PART NUMBER(2) OUTPUT VOLTAGE DC-DC OUTPUT VOLTAGE LDO
TPS61120PW Adjustable Adjustable
TPS61121PW 3.3 V 1.5 V
TPS61122PW 3.6 V 3.3 V
TPS61120RSA Adjustable Adjustable
TPS61121RSA 3.3 V 1.5 V
(1) Contact the factory to check availability of other fixed output voltage versions.
(2) The packages are available taped and reeled. Add R suffix to device type (for example TPS61120PWR or TPS61120RSAR) to order quantities of 2000 devices per reel for the TSSOP (PW) package and 3000 devices per reel for the QFN (RSA) package.

6 Pin Configuration and Functions

PW Package
16-Pin TSSOP
Top View
TPS61120 TPS61121 TPS61122 PO_LVS427.gif
RSA Package
16-Pin VQFN With Thermal Pad
Top View
TPS61120 TPS61121 TPS61122 PO1_LVS427.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
TSSOP VQFN
EN 7 5 I DC-DC-enable input. (1: VBAT enabled, 0: GND disabled)
FB 15 13 I DC-DC voltage feedback of adjustable versions
GND 12 10 I/O Control/logic ground
LBI 5 3 I Low battery comparator input (comparator enabled with EN)
LBO 13 11 O Low battery comparator output (open drain)
LDOEN 8 6 I LDO-enable input (1: LDOIN enabled, 0: GND disabled)
LDOOUT 10 8 O LDO output
LDOIN 9 7 I LDO input
LDOSENSE 11 9 I LDO feedback for voltage adjustment, must be connected to LDOOUT at fixed output voltage versions
SWP 1 15 I DC-DC rectifying switch input
PGND 3 1 I/O Power ground
PGOOD 14 12 O DC-DC output power good (1: good, 0 : failure) (open drain)
SKIPEN 6 4 I Enable/disable power save mode (1: VBAT enabled, 0: GND disabled)
SWN 2 16 I DC-DC switch input
VBAT 4 2 I Supply pin
VOUT 16 14 O DC-DC output

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range unless otherwise noted(1)
MIN MAX UNIT
Input voltage FB –0.3 3.6 V
SWN, SWP –0.3 10 V
VOUT, LDOIN, LDOOUT, LDOEN, LDOSENSE, PGOOD, LBO, VBAT, LBI, SKIPEN, EN –0.3 7 V
Maximum junction temperature TJ –40 150 °C
Storage temperature Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT
Supply voltage at VBAT, VI 1.8 5.5 V
Operating ambient temperature range, TA –40 85 °C
Operating virtual junction temperature range, TJ –40 125 °C

7.4 Thermal Information

THERMAL METRIC(1) TPS61120, TPS61121, TPS61122 TPS61120 UNIT
PW (TSSOP) RSA (VQFN)
16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 100.5 33.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 35.8 36.3 °C/W
RθJB Junction-to-board thermal resistance 45.4 11 °C/W
ψJT Junction-to-top characterization parameter 2.6 0.5 °C/W
ψJB Junction-to-board characterization parameter 44.8 11 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 2.2 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC-DC STAGE
VI Input voltage range 1.8 5.5 V
VO Adjustable output voltage range (TPS61120) 2.5 5.5 V
Vref Reference
voltage		 485 500 515 mV
f Oscillator
frequency		 400 500 600 kHz
ISW Switch current limit VOUT= 3.3 V 1100 1300 1600 mA
Startup current limit 0.4 * ISW mA
SWN switch on resistance VOUT= 3.3 V 200 350 mΩ
SWP switch on resistance VOUT= 3.3 V 250 500 mΩ
Total accuracy (including line and load regulation) -3% ±3%
DC-DC
quiescent
current		 into VBAT IO= 0 mA, VEN = VBAT = 1.8 V,
VOUT = 3.3 V, ENLDO = 0		 10 25 µA
into VOUT IO = 0 mA, VEN = VBAT = 1.8 V,
VOUT = 3.3 V, ENLDO = 0		 10 25 µA
DC-DC shutdown current VEN= 0 V 0.2 1 µA
LDO STAGE
VI(LDO) Input voltage range 1.8 7 V
VO(LDO) Adjustable output voltage range (TPS61120) 0.9 5.5 V
IO(max) Output current 200 320 mA
LDO short circuit current limit 500 mA
Minimum voltage drop IO= 200 mA 300 mV
Total accuracy (including line and load regulation) IO≥ 1 mA ±3%
Line regulation LDOIN change from 1.8 V to 2.6 V at 100 mA, LDOOUT = 1.5 V 0.6%
Load regulation Load change from 10% to 90%,
LDOIN = 3.3 V		 0.6%
LDO quiescent current LDOIN = 7 V, VBAT = 1.8 V, EN = VBAT 20 30 µA
LDO shutdown current LDOEN = 0 V, LDOIN = 7 V 0.1 1 µA
CONTROL STAGE
VIL LBI voltage threshold VLBI voltage decreasing 490 500 510 mV
LBI input hysteresis 10 mV
LBI input current EN = VBAT or GND 0.01 0.1 µA
LBO output low voltage VO = 3.3 V, IOI = 100 µA 0.04 0.4 V
LBO output low current 100 µA
LBO output leakage current VLBO = 7 V 0.01 0.1 µA
VIL EN, SKIPEN input low voltage 0.2 × VBAT V
VIH EN, SKIPEN input high voltage 0.8 × VBAT V
VIL LDOEN input low voltage 0.2 × VLDOIN V
VIH LDOEN input high voltage 0.8 × VLDOIN V
EN, SKIPEN input current Clamped on GND or VBAT 0.01 0.1 µA
Power-Good threshold VO = 3.3 V 0.9*VO 0.92*VO 0.95*VO V
Power-Good delay 30 µs
Power-Good output low voltage VO = 3.3 V, IOI = 100 µA 0.04 0.4 V
Power-Good output low current 100 µA
Power-Good output leakage current VPG = 7 V 0.01 0.1 µA
Overtemperature protection 140 °C
Overtemperature hysteresis 20 °C

7.6 Typical Characteristics

Table 2. Table of Graphs

FIGURE
BOOST CONVERTER
Maximum output current vs Input voltage Figure 1, Figure 2
Efficiency vs Output current (TPS61120) (VO = 2.5 V, VI = 1.8 V) Figure 3
vs Output current (TPS61121) (VO = 3.3 V, VI = 1.8 V, 2.4 V) Figure 4
vs Output current (TPS61120) (VO = 5.0 V, VI = 2.4 V, 3.3 V) Figure 5
vs Input voltage (TPS61121) Figure 6
Output voltage vs Output current (TPS61121) Figure 7
No-load supply current into VBAT vs Input voltage (TPS61121) Figure 8
No-load supply current into VOUT vs Input voltage (TPS61121) Figure 9
LDO
Maximum output current vs Input voltage (VO = 2.5 V, 3.3 V) Figure 10
vs Input voltage (VO = 1.5 V, 1.8 V) Figure 11
Output voltage vs Output current (TPS61122) Figure 12
Dropout voltage vs Output current (TPS61121, TPS61122) Figure 13
Supply current into LDOIN vs LDOIN input voltage (TPS61121) Figure 14
PSRR vs Frequency (TPS61121) Figure 15
TPS61120 TPS61121 TPS61122 MOC_IV5_LVS427.gifFigure 1. TPS61120 Maximum Boost Converter Output Current vs Input Voltage
TPS61120 TPS61121 TPS61122 MOC_IV2_LVS427.gifFigure 2. TPS61120 Maximum Boost Converter Output Current vs Input Voltage
TPS61120 TPS61121 TPS61122 EFF_OC25_LVS427.gifFigure 3. TPS61120 Boost Converter Efficiency vs Output Current
TPS61120 TPS61121 TPS61122 EFF_OC5_LVS427.gifFigure 5. TPS61120 Boost Converter Efficiency vs Output Current
TPS61120 TPS61121 TPS61122 OV_OC_LVS427.gifFigure 7. TPS61121 Boost Converter Output Voltage vs Output Current
TPS61120 TPS61121 TPS61122 SC_VOUT_IV_LVS427.gifFigure 9. TPS61121 No-Load Supply Current Into VOUT vs Input Voltage
TPS61120 TPS61121 TPS61122 MX_LDO18_LVS427.gifFigure 11. TPS61120 Maximum LDO Output Current vs LDO Input Voltage
TPS61120 TPS61121 TPS61122 LDO_DPV_LVS427.gifFigure 13. LDO Dropout Voltage vs LDO Output Current
TPS61120 TPS61121 TPS61122 PSRR_FRQ_LVS427.gifFigure 15. TPS61121 PSRR vs Frequency
TPS61120 TPS61121 TPS61122 EFF_OC33_LVS427.gifFigure 4. TPS61121 Boost Converter Efficiency vs Output Current
TPS61120 TPS61121 TPS61122 EFF_IV_LVS427.gifFigure 6. TPS61121 Boost Converter Efficiency vs Input Voltage
TPS61120 TPS61121 TPS61122 SC_VBAT_IV_LVS427.gifFigure 8. TPS61121 No-Load Supply Current Into VBAT vs Input Voltage
TPS61120 TPS61121 TPS61122 MX_LDO33_LVS427.gifFigure 10. TPS61120 Maximum LDO Output Current vs LDO Input Voltage
TPS61120 TPS61121 TPS61122 LDO_OV_LVS427.gifFigure 12. TPS61122 LDO Output Voltage vs LDO Output Current
TPS61120 TPS61121 TPS61122 SC_LDOIN_LVS427.gifFigure 14. TPS61121 Supply Current Into LDOIN vs LDO Input Voltage

8 Parameter Measurement Information

TPS61120 TPS61121 TPS61122 PMI_FSD_LVS427.gifFigure 16. TPS61120 Typical Application Schematic

9 Detailed Description

9.1 Overview

The TPS6112x synchronous step-up converter typically operates at a 500-kHz frequency pulse width modulation (PWM) at moderate to heavy load currents. The converter enters Power Save mode at low load currents to maintain a high efficiency over a wide load. The Power Save mode can also be disabled, forcing the converter to operate at a fixed switching frequency.

The TPS6112x family of devices is based on a fixed frequency with multiple feed forward controller topology. Input voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. Also, the peak current of the NMOS switch is sensed to limit the maximum current flowing through the switch and the inductor.

The device includes an additional built-in LDO which can be used to generate a second output voltage derived from the output of the TPS6112x or an external power supply.

Additionally, TPS6112x integrated the low-battery detector circuit is used to supervise the battery voltage and to generate an error flag when the battery voltage drops below a user-set threshold voltage.

9.2 Functional Block Diagram

TPS61120 TPS61121 TPS61122 FBD_LVS427.gif

9.3 Feature Description

9.3.1 Controller Circuit

The controller circuit of the device is based on a fixed-frequency multiple feedforward controller topology. Input voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier, only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to generate an accurate and stable output voltage.

The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and the inductor. The typical peak current limit is set to 1300 mA. An internal temperature sensor prevents the device from getting overheated in case of excessive power dissipation.

9.3.2 Synchronous Rectifier

The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier. Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power conversion efficiency reaches 95%. To avoid ground shift due to the high currents in the NMOS switch, two separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND pin. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in shutdown and allows current flowing from the battery to the output. This device however uses a special circuit which takes the cathode of the backgate diode of the high-side PMOS and disconnects it from the source when the regulator is not enabled (EN = low).

The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of the converter. No additional components have to be added to the design to make sure that the battery is disconnected from the output of the converter.

9.3.3 LDO

The built-in LDO can be used to generate a second output voltage derived from the DC-DC converter output, from the battery, or from another power source like an ac adapter or a USB power rail. The LDO is capable of being back biased. This allows the user to just connect the outputs of DC-DC converter and LDO. So the device is able to supply the load via DC-DC converter when the energy comes from the battery and efficiency is most important and from another external power source via the LDO when lower efficiency is not critical. The LDO must be disabled if the LDOIN voltage drops below LDOOUT to block reverse current flowing. The status of the DC-DC stage (enabled or disabled) does not matter.

9.3.4 Device Enable

The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is switched off, and the load is isolated from the input (as described in the Synchronous Rectifier section). This also means that the output voltage can drop below the input voltage during shutdown.

9.3.4.1 Undervoltage Lockout

An undervoltage lockout function prevents device start-up if the supply voltage on VBAT is lower than approximately 1.6 V. When in operation and the battery is being discharged, the device automatically enters the shutdown mode if the voltage on VBAT drops below approximately 1.6 V. This undervoltage lockout function is implemented in order to prevent the malfunctioning of the converter.

9.3.4.2 Softstart

During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high peak currents drawn from the battery. When the boost section is enabled, the internal startup cycle starts with the first step, the precharge phase. During precharge, the rectifying switch is turned on until the output capacitor is charged to a value close to the input voltage. The rectifying switch current is limited in that phase. This also limits the output current under short-circuit conditions at the output. After charging the output capacitor to the input voltage the device starts switching. Until the output voltage is reached, the boost switch current limit is set to 40% of its nominal value to avoid high peak currents at the battery during startup. When the output voltage is reached, the regulator takes control and the switch current limit is set back to 100%.

9.3.5 LDO Enable

The LDO can be separately enabled and disabled by using the LDOEN pin in the same way as the EN pin at the DC-DC converter stage described above. This is completely independent of the status of the EN pin. The voltage levels of the logic signals which need to be applied at LDOEN are related to LDOIN.

9.3.6 Power Good

The PGOOD pin stays high impedance when the DC-DC converter delivers an output voltage within a defined voltage window. So it can be used to enable any connected circuitry such as cascaded converters (LDO) or to reset microprocessor circuits.

9.3.7 Low Battery Detector Circuit—LBI/LBO

The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is enabled. When the device is disabled, the LBO pin is high-impedance. The switching threshold is 500 mV at LBI. During normal operation, LBO stays at high impedance when the voltage, applied at LBI, is above the threshold. It is active low when the voltage at LBI goes below 500 mV.

The battery voltage, at which the detection circuit switches, can be programmed with a resistive divider connected to the LBI pin. The resistive divider scales down the battery voltage to a voltage level of 500 mV, which is then compared to the LBI threshold voltage. The LBI pin has a built-in hysteresis of 10 mV. See the Programming the LBI/LBO Threshold Voltage section for more details about the programming of the LBI threshold. If the low-battery detection circuit is not used, the LBI pin should be connected to GND (or to VBAT) and the LBO pin can be left unconnected. Do not let the LBI pin float.

9.3.8 Low-EMI Switch

The device integrates a circuit that removes the ringing that typically appears on the SW node when the converter enters discontinuous current mode. In this case, the current through the inductor ramps to zero and the rectifying PMOS switch is turned off to prevent a reverse current flowing from the output capacitors back to the battery. Due to the remaining energy that is stored in parasitic components of the semiconductor and the inductor, a ringing on the SW pin is induced. The integrated antiringing switch clamps this voltage to VBAT and therefore dampens ringing.

9.4 Device Functional Modes

9.4.1 Power Save Mode

The SKIPEN pin can be used to select different operation modes. To enable the Power save mode, SKIPEN must be set high. Power save mode is used to improve efficiency at light loads. In power save mode, the converter only operates when the output voltage trips below a set threshold voltage. It ramps up the output voltage with several pulses, and goes again into power save mode once the output voltage exceeds the set threshold voltage. The skip mode can be disabled by setting the SKIPEN to GND.

 
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