SLVS497F SEPTEMBER   2003  – June 2016 TPS65140 , TPS65141 , TPS65145

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dissipation Ratings
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Main Boost Converter
      2. 7.3.2 Power Good Output
      3. 7.3.3 Enable and Power-On Sequencing (EN, ENR)
      4. 7.3.4 Positive Charge Pump
      5. 7.3.5 Negative Charge Pump
      6. 7.3.6 Linear Regulator Controller
      7. 7.3.7 Soft Start
      8. 7.3.8 Fault Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enabling and Disabling the Device
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Boost Converter Design Procedure
          1. 8.2.2.1.1  Inductor Selection
          2. 8.2.2.1.2  Output Capacitor Selection
          3. 8.2.2.1.3  Input Capacitor Selection
          4. 8.2.2.1.4  Rectifier Diode Selection
          5. 8.2.2.1.5  Converter Loop Design and Stability
          6. 8.2.2.1.6  Design Procedure Quick Steps
          7. 8.2.2.1.7  Setting the Output Voltage and Selecting the Feedforward Capacitor
          8. 8.2.2.1.8  Compensation
          9. 8.2.2.1.9  Negative Charge Pump
          10. 8.2.2.1.10 Positive Charge Pump
          11. 8.2.2.1.11 Linear Regulator Controller
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

PWP Package
24-Pin HTSSOP
Top View
RGE Package
24-Pin VQFN
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
HTSSOP VQFN
BASE 3 6 O Base drive output for the external transistor
C1+ 16 19 — Positive terminal of the charge pump flying capacitor
C1– 17 20 — Negative terminal of the charge pump flying capacitor
C2+ 14 17 — Positive terminal for the charge pump flying capacitor. If the device runs in voltage doubler mode, this pin must be left open.
C2–/MODE 15 18 — Negative terminal of the charge pump flying capacitor and charge pump MODE pin. If the flying capacitor is connected to this pin, the converter operates in a voltage tripler mode. If the charge pump must operate in a voltage doubler mode, the flying capacitor is removed and the C2-/MODE pin must be connected to GND.
COMP 22 1 — Compensation pin for the main boost converter. A small capacitor is connected to this pin.
DRV 18 21 O External charge pump driver
EN 24 3 I Enable pin of the device. This pin must be terminated and not be left floating. A logic high enables the device and a logic low shuts down the device.
ENR 23 2 I Enable pin of the linear regulator controller. This pin must be terminated and not be left floating. Logic high enables the regulator and a logic low puts the regulator in shutdown.
FB1 1 4 I Feedback pin of the boost converter
FB2 21 24 I Feedback pin of negative charge pump
FB3 12 15 I Feedback pin of positive charge pump
FB4 2 5 I Feedback pin of the linear regulator controller. The linear regulator controller is set to a fixed output voltage of 3.3 V or 3 V depending on the version.
GND 11, 19 14, 22 — Ground
OUT3 13 16 O Positive charge pump output
PG 10 13 O Open-drain output indicating when all outputs VO1, VO2, VO3 are within 10% of their nominal output voltage. The output goes low when one of the outputs falls below 10% of their nominal output voltage.
PGND 7, 8 10, 11 — Power ground
PowerPAD / Thermal Die — — — The PowerPAD or exposed thermal die must be connected to power ground pins (PGND)
REF 20 23 O Internal reference output typically 1.23 V
SUP 9 12 I Supply pin of the positive, negative charge pump, boost converter, and gate drive circuit. This pin must be connected to the output of the main boost converter and cannot be connected to any other voltage source. For performance reasons, TI does not recommend connecting a bypass capacitor directly to this pin.
SW 5, 6 8, 9 I Switch pin of the boost converter
VIN 4 7 I Input voltage pin of the device.