4 Revision History
Changes from B Revision (August 2010) to C Revision
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Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
Changes from A Revision (October 2009) to B Revision
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In the Ordering Information Table, changed the SVS column From: Included To: N/A for devices TPS650001, TPS650003, TPS650006 Go
Changes from * Revision (June 2009) to A Revision
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Changed the PG pin connection From: VDCDC To: VIN in the application circuit.Go
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Changed resistor values for VLDO1 and VLDO2 in the application circuit.Go
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Changed the configuration of the PG and RST pins in the application circuitGo
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Added Note 2: to the Electrical Characteristics table.Go
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Changed Figure 1 title From: EFFICIENCY (DCDC PFM Mode) To: EFFICIENCY (DCDC 600mA PFM Mode)Go
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Changed Figure 2 title From: EFFICIENCY (DCDC PFM Mode) To: EFFICIENCY (DCDC 600mA PFM Mode)Go
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Added Figure 3, EFFICIENCY (DCDC PWM Mode)Go
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Added Figure 4, EFFICIENCY (DCDC PWM Mode)Go
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Changed the configuration of the PG pin in Figure 24 Go
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Changed the PG pin connection From: VDCDC To: VIN in Figure 31.Go
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Changed the configuration of the PG and RST pins in Figure 31 Go
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Added Figure 32, Typical TPS650001 Application SchematicGo
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Added Figure 33, Typical TPS650061 Application SchematicGo