SLVSA82F March   2011  – December 2014 TPS43330-Q1 , TPS43332-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Buck Controllers: Normal Mode PWM Operation
        1. 8.3.1.1 Frequency Selection and External Synchronization
        2. 8.3.1.2 Enable Inputs
        3. 8.3.1.3 Feedback Inputs
        4. 8.3.1.4 Soft-Start Inputs
        5. 8.3.1.5 Current Sensing and Current Limit With Foldback
        6. 8.3.1.6 Slope Compensation
        7. 8.3.1.7 Power-Good Outputs and Filter Delays
      2. 8.3.2 Boost Controller
      3. 8.3.3 Frequency-Hopping Spread Spectrum
      4. 8.3.4 Gate-Driver Supply (VREG, EXTSUP)
      5. 8.3.5 External P-Channel Drive (GC2) and Reverse-Battery Protection
      6. 8.3.6 Undervoltage Lockout and Overvoltage Protection
      7. 8.3.7 Thermal Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Buck Controllers: Current-Mode Operation
      2. 8.4.2 Buck Controllers: Light-Load PFM Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Boost Component Selection
        2. 9.2.2.2  Boost Maximum Input Current IIN_MAX
        3. 9.2.2.3  Boost Inductor Selection, L
        4. 9.2.2.4  Inductor Ripple Current, IRIPPLE
        5. 9.2.2.5  Peak Current in Low-Side FET, IPEAK
        6. 9.2.2.6  Right Half-Plane Zero RHP Frequency, fRHP
        7. 9.2.2.7  Output Capacitor, COUTx
        8. 9.2.2.8  Bandwidth of Boost Converter, fC
        9. 9.2.2.9  Output Ripple Voltage Due to Load Transients, ∆VOUTx
        10. 9.2.2.10 Selection of Components for Type II Compensation
        11. 9.2.2.11 Input Capacitor, CIN
        12. 9.2.2.12 Output Schottky Diode D1 Selection
        13. 9.2.2.13 Low-Side MOSFET (BOT_SW3)
        14. 9.2.2.14 BuckA Component Selection
          1. 9.2.2.14.1 BuckA Component Selection
          2. 9.2.2.14.2 Current-Sense Resistor RSENSE
        15. 9.2.2.15 Inductor Selection L
        16. 9.2.2.16 Inductor Ripple Current IRIPPLE
        17. 9.2.2.17 Output Capacitor COUTA
        18. 9.2.2.18 Bandwidth of Buck Converter fC
        19. 9.2.2.19 Selection of Components for Type II Compensation
        20. 9.2.2.20 Resistor Divider Selection for Setting VOUTA Voltage
        21. 9.2.2.21 BuckB Component Selection
        22. 9.2.2.22 Resistor Divider Selection for Setting VOUT Voltage
        23. 9.2.2.23 BuckX High-Side and Low-Side N-Channel MOSFETs
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Boost Converter
      2. 11.1.2 Buck Converter
      3. 11.1.3 Other Considerations
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation Derating Profile, 38-Pin HTTSOP PowerPAD™ Package
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

10 Power Supply Recommendations

The TPS43330-Q1 device is designed to operate from an input voltage up to 40 V. Ensure that the input supply is well regulated. Furthermore, if the supply voltage in the application is likely to reach negative voltage (for example, reverse battery) a forward diode must be placed at the input of the supply. For the VIN pin, a good quality X7R ceramic capacitor is recommended. Capacitance derating for aging, temperature, and DC bias must be taken into account while determining the capacitor value. Connect a local decoupling capacitor close to the Vreg for proper filtering. The PowerPAD™ package, which offers an exposed thermal pad to enhance thermal performance, must be soldered to the copper landing on the PCB for optimal performance.