DRV8834 Dual-Bridge Stepper or DC Motor Driver

1 Features

Dual-H-Bridge Current-Control Motor Driver
- Capable of Driving Two DC Motors or One Stepper Motor
Two Control Modes:
- Built-In Indexer Logic With Simple STEP/DIRECTION Control and Up to
  1/32-Step Microstepping
- PHASE/ENABLE Control, With the Ability to Drive External References for > 1/32-Step Microstepping
Output Current 1.5-A Continuous, 2.2-A Peak per H-Bridge (at V_M = 5 V, 25°C)
Low R_DS(ON): 305-mΩ HS + LS
(at V_M = 5 V, 25°C)
Wide Power Supply Voltage Range:
2.5 V to 10.8 V
Dynamic t_BLANK and Mixed Decay Modes for Smooth Microstepping
PWM Winding Current Regulation and Limiting
Thermally Enhanced Surface-Mount Package

2 Applications

Battery-Powered Toys
POS Printers
Video Security Cameras
Office Automation Machines
Gaming Machines
Robotics

3 Description

The DRV8834 provides a flexible motor driver solution for toys, printers, cameras, and other mechatronic applications. The device has two H-bridge drivers, and is intended to drive a bipolar stepper motor or two DC motors.

The output driver block of each H-bridge consists of N-channel power MOSFETs configured as an H-bridge to drive the motor windings. Each H-bridge includes circuitry to regulate or limit the winding current.

With proper PCB design, each H-bridge of the DRV8834 can driving up to 1.5-A RMS (or DC) continuously, at 25°C with a V_M supply of 5 V. The device can support peak currents of up to 2.2 A per bridge. Current capability is reduced slightly at lower V_M voltages.

Internal shutdown functions with a fault output pin are provided for overcurrent protection, short-circuit protection, undervoltage lockout and overtemperature. A low-power sleep mode is also provided.

The DRV8834 is packaged in a 24-pin HTSSOP or VQFN package with PowerPAD™ (Eco-friendly: RoHS & no Sb/Br).

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
DRV8834	HTSSOP (24)	7.80 mm × 4.40 mm
DRV8834	VQFN (24)	4.00 mm × 4.00 mm

For all available packages, see the orderable addendum at the end of the data sheet.

4 Simplified Schematic

5 Revision History

Changes from C Revision (June 2013) to D Revision

Added ESD Ratings table, Features Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
Deleted Ordering Information table.Go

6 Pin Configuration and Functions

PWP Package

24-Pin HTSSOP

Top View

RGE Package

24-Pin VQFN

Top View

Pin Functions

PIN			I/O	DESCRIPTION	EXTERNAL COMPONENTS OR CONNECTIONS
NAME	HTSSOP	VQFN	I/O	DESCRIPTION	EXTERNAL COMPONENTS OR CONNECTIONS
POWER AND GROUND
GND	21, PPAD	18, PPAD	—	Device ground	Both the GND pin and device PowerPAD must be connected to ground
VM	18, 19	15, 16	—	Bridge A power supply	Connect to motor supply. A 10-µF (minimum) capacitor to GND is recommended.
VINT	20	17	—	Internal supply	Bypass to GND with 2.2-μF (minimum), 6.3-V capacitor. Can be used to provide logic high voltage for configuration pins (except nSLEEP).
VREFO	24	21	O	Reference voltage output	May be connected to AVREF/BVREF inputs. Do not place a bypass capacitor on this pin.
VCP	17	14	O	High-side gate drive voltage	Connect a 0.01-μF, 16-V (minimum) X7R ceramic capacitor to VM.
CONTROL (INDEXER MODE OR PHASE/ENABLE MODE)
nENBL/AENBL	10	7	I	Step motor enable/Bridge A enable	Indexer mode: Logic low enables all outputs. Phase/enable mode: Logic high enables the AOUTx outputs. Internal pulldown.
STEP/BENBL	11	8	I	Step input/Bridge B enable	Indexer mode: Rising edge moves indexer to next step. Phase/enable mode: Logic high enables the BOUTx outputs. Internal pulldown.
DIR/BPHASE	12	9	I	Direction input/Bridge B Phase	Indexer mode: Level sets direction of step. Phase/enable mode: Logic high sets BOUT1 high, BOUT2 low. Internal pulldown.
M0/APHASE	13	10	I	Microstep mode/Bridge A phase	Indexer mode: Controls microstep mode (full, half, up to 1/32-step) along with M1. Phase/enable mode: Logic high sets AOUT1 high, AOUT2 low. Internal pulldown.
M1	14	11	I	Microstep mode/Disable state	Indexer mode: Controls microstep mode (full, half, up to 1/32-step) along with M0. Phase/enable mode: Determines the state of the outputs when xENBL = 0. Internal pulldown.
CONFIG	15	12	I	Device configuration	Logic high to put the device in indexer mode. Logic low to put the device into phase/enable mode. State is latched at power up and sleep exit. Internal pulldown.
nSLEEP	1	22	I	Sleep mode input	Logic high to enable device, logic low to enter low-power sleep mode and reset all internal logic.
AVREF	22	19	I	Bridge A current set reference input	Reference voltage for AOUT winding current. In Indexer Mode, it should be tied to a reference voltage for the internal DAC (for example, VREFO). In Phase/Enable Mode, an external DAC can drive it for microstepping.
BVREF	23	20	I	Bridge B current set reference input	Reference voltage for BOUT winding current. In Indexer Mode, it should be tied to a reference voltage for the internal DAC (for example, VREFO). In Phase/Enable Mode, an external DAC can drive it for microstepping.
ADECAY	3	24	I	Decay mode for bridge A	Determines decay mode for H-Bridge A (or A and B in indexer mode) – slow, fast or mixed decay
BDECAY	2	23	I	Decay mode for bridge B	Determines decay mode for H-Bridge B – slow, fast or mixed decay
STATUS
nFAULT	16	13	OD	Fault output	Logic low when in fault condition (overtemp, overcurrent, undervoltage)
OUTPUT
AISEN	5	2	IO	Bridge A ground/Isense	Connect to current sense resistor for bridge A, or GND if current control not needed
BISEN	8	5	IO	Bridge B ground/Isense	Connect to current sense resistor for bridge B, or GND if current control not needed
AOUT1	4	1	O	Bridge A output 1	Connect to motor winding A
AOUT2	6	3	O	Bridge A output 2	Connect to motor winding A
BOUT1	9	6	O	Bridge B output 1	Connect to motor winding B
BOUT2	7	4	O	Bridge B output 2	Connect to motor winding B

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

		MIN	MAX	UNIT
VM	Power supply voltage	–0.3	11.8	V
AVREF, BVREF, VINT, ADECAY, BDECAY	Analog input pin voltage	–0.5	3.6	V
	Digital input pin voltage	–0.5	7	V
	xISEN pin voltage	–0.3	0.5	V
	Peak motor drive output current, t < 1 µs	Internally limited		A
T_J	Operating virtual junction temperature	–40	150	°C
T_stg	Storage temperature	–60	150	°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

7.2 ESD Ratings

			VALUE		UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	±4000		V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	±1500		V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

T_A = 25°C, over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_M	Motor power supply voltage range⁽¹⁾	2.5	10.8	V
V_REF	VREF input voltage range⁽²⁾	1	2.1	V
I_VINT	VINT external load current		1	mA
I_VREF	VREF external load current		400	µA
V_DIGIN	Digital input pin voltage range	–0.3	5.75	V
I_OUT	Continuous RMS or DC output current per bridge⁽³⁾		1.5	A

(1) R_DS(ON) increases and maximum output current is reduced at VM supply voltages below 5 V.

(2) Operational at VREF between 0 V and 1 V, but accuracy is degraded.

(3) Power dissipation and thermal limits must be observed.

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		DRV8834		UNIT
		PWP [HTSSOP]	RGE [VQFN]
		24 PINS	24 PINS
R_θJA	Junction-to-ambient thermal resistance	40.2	35.1	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	23.7	36.6
R_θJB	Junction-to-board thermal resistance	21.9	12.2
ψ_JT	Junction-to-top characterization parameter	0.7	0.6
ψ_JB	Junction-to-board characterization parameter	21.7	12.2
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	3.9	4

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

T_A = 25°C, over operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER SUPPLY
I_VM	VM operating supply current	V_M = 5 V, excluding winding current		2.4	4	mA
I_VM	VM operating supply current	V_M = 10 V, excluding winding current		2.75		mA
I_VMQ	VM sleep mode supply current	V_M = 5 V		0.6	2	μA
I_VMQ	VM sleep mode supply current	V_M = 10 V		9.6		μA
V_UVLO	VM undervoltage lockout voltage	V_M falling			2.39	V
INTERNAL REGULATORS
V_INT	VINT voltage	V_M > 3.3 V, I_OUT = 0 A to 1 mA	2.85	3	3.15	V
V_REFO	VREF voltage	I_OUT = 0 A to 400 µA	1.9	2	2.1	V
LOGIC-LEVEL INPUTS
V_IL	Input low voltage	nSLEEP			0.5	V
V_IL	Input low voltage	All other digital input pins			0.7	V
V_IH	Input high voltage	nSLEEP	2.5			V
V_IH	Input high voltage	All other digital input pins	2			V
V_HYS	Input hysteresis	nSLEEP		0.2		V
V_HYS	Input hysteresis	All except nSLEEP		0.4		V
R_PD	Input pulldown resistance	nSLEEP		500		kΩ
R_PD	Input pulldown resistance	All except nSLEEP, M0		200		kΩ
I_IL	Input low current	VIN = 0			1	μA
I_IN	Input current (M0)		-20		20	µA
I_IH	Input high current	VIN = 3.3 V, nSLEEP		6.6	13	μA
I_IH	Input high current	VIN = 3.3 V, all except nSLEEP		16.5	33	μA
t_DEG	Input deglitch time		312		468	ns
nFAULT OUTPUT (OPEN-DRAIN OUTPUT)
V_OL	Output low voltage	I_O = 5 mA			0.5	V
I_OH	Output high leakage current	V_O = 3.3 V			1	μA
H-BRIDGE FETs
R_DS(ON)	HS FET ON-resistance	V_M = 5 V, I_O = 500 mA, T_J = 25°C		160	250	mΩ
		V_M = 5 V, I_O = 500 mA, T_J = 85°C		190
		V_M = 2.7 V, I_O = 500 mA, T_J = 25°C		200	295
		V_M = 2.7 V, I_O = 500 mA, T_J = 85°C		240
	LS FET ON-resistance	V_M = 5 V, I_O = 500 mA, T_J = 25°C		145	240
		V_M = 5 V, I_O = 500 mA, T_J = 85°C		180
		V_M = 2.7 V, I_O = 500 mA, T_J = 25°C		190	285
		V_M = 2.7 V, I_O = 500 mA, T_J = 85°C		235
I_OFF	Off-state leakage current		–2		2	μA
MOTOR DRIVER
f_PWM	Current control PWM frequency	Internal PWM frequency		42.5		kHz
t_BLANK	Current sense blanking time	V_REF > 375 mV or DAC codes > 29%		2.4		µs
t_BLANK	Current sense blanking time	V_REF < 375 mV or DAC codes < 29%		1.6		µs
t_R	Rise time	V_M = 5 V, 16 Ω to GND, 10% to 90% V_M		120		ns
t_F	Fall time	V_M = 5 V, 16 Ω to GND, 10% to 90% V_M		100		ns
PROTECTION CIRCUITS
I_OCP	Overcurrent protection trip level		2			A
t_OCP	Overcurrent protection period	V_REF > 375 mV or DAC codes > 29%		1.6		µs
t_OCP	Overcurrent protection period	V_REF < 375 mV or DAC codes < 29%		1.1		µs
t_TSD	Thermal shutdown temperature	Die temperature	150	160	180	°C
CURRENT CONTROL
I_REF	VREF input current	VREF = 3.3 V	–1		1	µA
V_TRIP	xISEN trip voltage	For 100% current step		xVREF/5		V
A_ISENSE	Current sense amplifier gain	Reference only		5		V/V

7.6 Timing Requirements

T_A = 25°C, over operating free-air temperature range (unless otherwise noted)

NO.	PARAMETER	CONDITIONS	MIN	MAX	UNIT
1	f_STEP	Step frequency		250	kHz
2	t_WH(STEP)	Pulse duration, STEP high	1.9		µs
3	t_WL(STEP)	Pulse duration, STEP low	1.9		µs
4	t_SU(STEP)	Setup time, command to STEP rising	200		ns
5	t_H(STEP)	Hold time, command to STEP rising	1		µs
6	t_WAKE	Wake-up time, nSLEEP inactive to STEP		1	ms